ARCv2: Support for ARCv2 ISA and HS38x cores
authorVineet Gupta <vgupta@synopsys.com>
Mon, 13 May 2013 13:00:41 +0000 (18:30 +0530)
committerVineet Gupta <vgupta@synopsys.com>
Mon, 22 Jun 2015 08:36:55 +0000 (14:06 +0530)
commit1f6ccfff6314672743ad7252160654709e997a2a
treef2027c01b8d010b9d1aaa3685c7c4d0644271f53
parent820970a5aa3c98be26e1df64da4b93294d20d4e7
ARCv2: Support for ARCv2 ISA and HS38x cores

The notable features are:
    - SMP configurations of upto 4 cores with coherency
    - Optional L2 Cache and IO-Coherency
    - Revised Interrupt Architecture (multiple priorites, reg banks,
        auto stack switch, auto regfile save/restore)
    - MMUv4 (PIPT dcache, Huge Pages)
    - Instructions for
* 64bit load/store: LDD, STD
* Hardware assisted divide/remainder: DIV, REM
* Function prologue/epilogue: ENTER_S, LEAVE_S
* IRQ enable/disable: CLRI, SETI
* pop count: FFS, FLS
* SETcc, BMSKN, XBFU...

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
22 files changed:
arch/arc/Kconfig
arch/arc/Makefile
arch/arc/include/asm/arcregs.h
arch/arc/include/asm/bitops.h
arch/arc/include/asm/elf.h
arch/arc/include/asm/entry-arcv2.h [new file with mode: 0644]
arch/arc/include/asm/entry.h
arch/arc/include/asm/irq.h
arch/arc/include/asm/irqflags-arcv2.h
arch/arc/include/asm/irqflags-compact.h
arch/arc/include/asm/irqflags.h
arch/arc/include/asm/ptrace.h
arch/arc/include/asm/thread_info.h
arch/arc/kernel/Makefile
arch/arc/kernel/entry-arcv2.S [new file with mode: 0644]
arch/arc/kernel/head.S
arch/arc/kernel/process.c
arch/arc/kernel/ptrace.c
arch/arc/kernel/setup.c
arch/arc/kernel/signal.c
arch/arc/kernel/troubleshoot.c
arch/arc/mm/tlbex.S