[AArch64] Disable some optimization cases for type conversion from sint to fp, becaus...
authorJiangning Liu <jiangning.liu@arm.com>
Thu, 24 Jul 2014 01:29:59 +0000 (01:29 +0000)
committerJiangning Liu <jiangning.liu@arm.com>
Thu, 24 Jul 2014 01:29:59 +0000 (01:29 +0000)
commit1bc34d71b70f17c090d4cf972d347fbdecfd96f8
tree6d1856a3fa30d1bcbec8bebda066683baa456afa
parentd28cfd150b9b3bf84a0c3814b115890c2a986c29
[AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213827 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64InstrInfo.td
test/CodeGen/AArch64/arm64-scvt.ll