This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are option...
authorMihai Popa <mihail.popa@gmail.com>
Tue, 11 Jun 2013 09:39:51 +0000 (09:39 +0000)
committerMihai Popa <mihail.popa@gmail.com>
Tue, 11 Jun 2013 09:39:51 +0000 (09:39 +0000)
commit16ad92ad3cd0cbbaa4d0524d9f201dd5dbefa15a
tree373783304fc9f7ec20d07f618e11fb22119bcb08
parentaa8003712e8b28bc4f263aeb79d8851146273a05
This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183733 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrVFP.td
lib/Target/ARM/ARMRegisterInfo.td
test/MC/ARM/simple-fp-encoding.s
test/MC/Disassembler/ARM/fp-encoding.txt