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(parent: d91ff7c) | patch
Change codegen for setcc to read the bit directly out of the condition
authorNate Begeman <natebegeman@mac.com>
Mon, 18 Apr 2005 02:43:24 +0000 (02:43 +0000)
committerNate Begeman <natebegeman@mac.com>
Mon, 18 Apr 2005 02:43:24 +0000 (02:43 +0000)
commit16ac709c632dd4d6dff8fdfe0b79a47c783b362a
treee27313de8df6a740c3ba4e7153ecba29e3345945tree | snapshot
parentd91ff7cd3b08cfe30b731799da8358dd9f90558ccommit | diff
Change codegen for setcc to read the bit directly out of the condition
  register.  Added support in the .td file for the g5-specific variant
  of cr -> gpr moves that executes faster, but we currently don't
  generate it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21314 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelPattern.cpp diff | blob | history
lib/Target/PowerPC/PPCInstrFormats.td diff | blob | history
lib/Target/PowerPC/PPCInstrInfo.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors