Sparc: Prefer reg+reg address encoding when only one register used.
authorJames Y Knight <jyknight@google.com>
Wed, 29 Apr 2015 14:54:44 +0000 (14:54 +0000)
committerJames Y Knight <jyknight@google.com>
Wed, 29 Apr 2015 14:54:44 +0000 (14:54 +0000)
commit0e13ba820808273d6515f4894be4cb0c05f509f6
tree99051e800bda656e7f107d9dbc1a2b5f95198c93
parent4389f0be7350303a366bf936e195d2e6a76d2e2a
Sparc: Prefer reg+reg address encoding when only one register used.

Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces.

Futhermore, reg+imm is invalid for the (not yet supported) "alternate
address space" instructions.

Differential Revision: http://reviews.llvm.org/D8753

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236107 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
test/MC/Disassembler/Sparc/sparc-mem.txt
test/MC/Sparc/sparc-ctrl-instructions.s
test/MC/Sparc/sparc-mem-instructions.s