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(parent: 27f1ced) | patch
Adding support to LLVM for targeting Cortex-A72
authorRenato Golin <renato.golin@linaro.org>
Wed, 4 Feb 2015 13:31:29 +0000 (13:31 +0000)
committerRenato Golin <renato.golin@linaro.org>
Wed, 4 Feb 2015 13:31:29 +0000 (13:31 +0000)
commit0966a4e3706413ab64a95f7b841398b76059edb4
treec4f693363cfdaa041676e544bedff03aa780378atree | snapshot
parent27f1ced481de28db03e6a9f3bf5546a4f13616c8commit | diff
Adding support to LLVM for targeting Cortex-A72

Currently, Cortex-A72 is modelled as an Cortex-A57 except the fp
load balancing pass isn't enabled for Cortex-A72 as it's not
profitable to have it enabled for this core.

Patch by Ranjeet Singh.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228140 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64.td diff | blob | history
lib/Target/ARM/ARM.td diff | blob | history
test/CodeGen/AArch64/cpus.ll diff | blob | history
test/CodeGen/AArch64/remat.ll diff | blob | history
test/CodeGen/ARM/build-attributes.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors