[ARM] Implement ISB memory barrier intrinsic
authorYi Kong <Yi.Kong@arm.com>
Thu, 3 Jul 2014 16:00:41 +0000 (16:00 +0000)
committerYi Kong <Yi.Kong@arm.com>
Thu, 3 Jul 2014 16:00:41 +0000 (16:00 +0000)
commit090a8f45f20688a03f5fe9c797a64a22ec004adc
tree535a27092b0cb0296b516552e575f1829734643f
parent1a699b68339c336dc26de2d3254e0eb90a7cae14
[ARM] Implement ISB memory barrier intrinsic

Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions
modelling by adding has-side-effects property.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212276 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IR/IntrinsicsARM.td
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/ARMInstrThumb2.td
test/CodeGen/ARM/intrinsics-memory-barrier.ll [new file with mode: 0644]