X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FTableGen.cpp;h=f20ec00aa0e5ca43b926392f25e004b23073ae95;hb=7a68e0df0d2eb46f509ef086729e46a0e79e4750;hp=6f330ea81871c915b4b99082a677a1cd9553bad4;hpb=9833493bae15d9b84cb1c5dc26a2d7bcc8aefebd;p=oota-llvm.git diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp index 6f330ea8187..f20ec00aa0e 100644 --- a/utils/TableGen/TableGen.cpp +++ b/utils/TableGen/TableGen.cpp @@ -1,357 +1,308 @@ +//===- TableGen.cpp - Top-Level TableGen implementation -------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TableGen is a tool which can be used to build up a description of something, +// then invoke one or more "tablegen backends" to emit information about the +// description in some predefined format. In practice, this is used by the LLVM +// code generators to automate generation of a code generator through a +// high-level description of the target. +// +//===----------------------------------------------------------------------===// + +#include "AsmMatcherEmitter.h" +#include "AsmWriterEmitter.h" +#include "CallingConvEmitter.h" +#include "ClangDiagnosticsEmitter.h" +#include "CodeEmitterGen.h" +#include "DAGISelEmitter.h" +#include "DisassemblerEmitter.h" +#include "EDEmitter.h" +#include "FastISelEmitter.h" +#include "InstrEnumEmitter.h" +#include "InstrInfoEmitter.h" +#include "IntrinsicEmitter.h" +#include "LLVMCConfigurationEmitter.h" +#include "OptParserEmitter.h" #include "Record.h" -#include "Support/CommandLine.h" +#include "RegisterInfoEmitter.h" +#include "SubtargetEmitter.h" +#include "TGParser.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/FileUtilities.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/PrettyStackTrace.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/System/Signals.h" #include +#include +using namespace llvm; + +enum ActionType { + PrintRecords, + GenEmitter, + GenRegisterEnums, GenRegister, GenRegisterHeader, + GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher, + GenDisassembler, + GenCallingConv, + GenClangDiagsDefs, + GenClangDiagGroups, + GenDAGISel, + GenFastISel, + GenOptParserDefs, GenOptParserImpl, + GenSubtarget, + GenIntrinsic, + GenTgtIntrinsic, + GenLLVMCConf, + GenEDHeader, GenEDInfo, + PrintEnums +}; -static cl::opt Class("class", cl::desc("Print Enum list for this class")); -static cl::opt Parse("parse"); - -void ParseFile(); - -RecordKeeper Records; - -static Init *getBit(Record *R, unsigned BitNo) { - const std::vector &V = R->getValues(); - for (unsigned i = 0, e = V.size(); i != e; ++i) - if (V[i].getPrefix()) { - assert(dynamic_cast(V[i].getValue()) && - "Can only handle fields of bits<> type!"); - BitsInit *I = (BitsInit*)V[i].getValue(); - if (BitNo < I->getNumBits()) - return I->getBit(BitNo); - BitNo -= I->getNumBits(); - } - - std::cerr << "Cannot find requested bit!\n"; - abort(); - return 0; -} - -static unsigned getNumBits(Record *R) { - const std::vector &V = R->getValues(); - unsigned Num = 0; - for (unsigned i = 0, e = V.size(); i != e; ++i) - if (V[i].getPrefix()) { - assert(dynamic_cast(V[i].getValue()) && - "Can only handle fields of bits<> type!"); - Num += ((BitsInit*)V[i].getValue())->getNumBits(); - } - return Num; -} - -static bool BitsAreFixed(Record *I1, Record *I2, unsigned BitNo) { - return dynamic_cast(getBit(I1, BitNo)) && - dynamic_cast(getBit(I2, BitNo)); -} - -static bool BitsAreEqual(Record *I1, Record *I2, unsigned BitNo) { - BitInit *Bit1 = dynamic_cast(getBit(I1, BitNo)); - BitInit *Bit2 = dynamic_cast(getBit(I2, BitNo)); - - return Bit1 && Bit2 && Bit1->getValue() == Bit2->getValue(); -} - -static bool BitRangesEqual(Record *I1, Record *I2, - unsigned Start, unsigned End) { - for (unsigned i = Start; i != End; ++i) - if (!BitsAreEqual(I1, I2, i)) - return false; - return true; -} - -static unsigned getFirstFixedBit(Record *R, unsigned FirstFixedBit) { - // Look for the first bit of the pair that are required to be 0 or 1. - while (!dynamic_cast(getBit(R, FirstFixedBit))) - ++FirstFixedBit; - return FirstFixedBit; -} - -static void FindInstDifferences(Record *I1, Record *I2, - unsigned FirstFixedBit, unsigned MaxBits, - unsigned &FirstVaryingBitOverall, - unsigned &LastFixedBitOverall) { - // Compare the first instruction to the rest of the instructions, looking for - // fields that differ. - // - unsigned FirstVaryingBit = FirstFixedBit; - while (FirstVaryingBit < MaxBits && BitsAreEqual(I1, I2, FirstVaryingBit)) - ++FirstVaryingBit; - - unsigned LastFixedBit = FirstVaryingBit; - while (LastFixedBit < MaxBits && BitsAreFixed(I1, I2, LastFixedBit)) - ++LastFixedBit; +namespace { + cl::opt + Action(cl::desc("Action to perform:"), + cl::values(clEnumValN(PrintRecords, "print-records", + "Print all records to stdout (default)"), + clEnumValN(GenEmitter, "gen-emitter", + "Generate machine code emitter"), + clEnumValN(GenRegisterEnums, "gen-register-enums", + "Generate enum values for registers"), + clEnumValN(GenRegister, "gen-register-desc", + "Generate a register info description"), + clEnumValN(GenRegisterHeader, "gen-register-desc-header", + "Generate a register info description header"), + clEnumValN(GenInstrEnums, "gen-instr-enums", + "Generate enum values for instructions"), + clEnumValN(GenInstrs, "gen-instr-desc", + "Generate instruction descriptions"), + clEnumValN(GenCallingConv, "gen-callingconv", + "Generate calling convention descriptions"), + clEnumValN(GenAsmWriter, "gen-asm-writer", + "Generate assembly writer"), + clEnumValN(GenDisassembler, "gen-disassembler", + "Generate disassembler"), + clEnumValN(GenAsmMatcher, "gen-asm-matcher", + "Generate assembly instruction matcher"), + clEnumValN(GenDAGISel, "gen-dag-isel", + "Generate a DAG instruction selector"), + clEnumValN(GenFastISel, "gen-fast-isel", + "Generate a \"fast\" instruction selector"), + clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", + "Generate option definitions"), + clEnumValN(GenOptParserImpl, "gen-opt-parser-impl", + "Generate option parser implementation"), + clEnumValN(GenSubtarget, "gen-subtarget", + "Generate subtarget enumerations"), + clEnumValN(GenIntrinsic, "gen-intrinsic", + "Generate intrinsic information"), + clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", + "Generate target intrinsic information"), + clEnumValN(GenClangDiagsDefs, "gen-clang-diags-defs", + "Generate Clang diagnostics definitions"), + clEnumValN(GenClangDiagGroups, "gen-clang-diag-groups", + "Generate Clang diagnostic groups"), + clEnumValN(GenLLVMCConf, "gen-llvmc", + "Generate LLVMC configuration library"), + clEnumValN(GenEDHeader, "gen-enhanced-disassembly-header", + "Generate enhanced disassembly info header"), + clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info", + "Generate enhanced disassembly info"), + clEnumValN(PrintEnums, "print-enums", + "Print enum values for a class"), + clEnumValEnd)); + + cl::opt + Class("class", cl::desc("Print Enum list for this class"), + cl::value_desc("class name")); + + cl::opt + OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"), + cl::init("-")); + + cl::opt + InputFilename(cl::Positional, cl::desc(""), cl::init("-")); + + cl::list + IncludeDirs("I", cl::desc("Directory of include files"), + cl::value_desc("directory"), cl::Prefix); - if (FirstVaryingBit < FirstVaryingBitOverall) - FirstVaryingBitOverall = FirstVaryingBit; - if (LastFixedBit < LastFixedBitOverall) - LastFixedBitOverall = LastFixedBit; + cl::opt + ClangComponent("clang-component", + cl::desc("Only use warnings from specified component"), + cl::value_desc("component"), cl::Hidden); } -static bool getBitValue(Record *R, unsigned BitNo) { - Init *I = getBit(R, BitNo); - assert(dynamic_cast(I) && "Bit should be fixed!"); - return ((BitInit*)I)->getValue(); -} -struct BitComparator { - unsigned BitBegin, BitEnd; - BitComparator(unsigned B, unsigned E) : BitBegin(B), BitEnd(E) {} +// FIXME: Eliminate globals from tblgen. +RecordKeeper llvm::Records; - bool operator()(Record *R1, Record *R2) { // Return true if R1 is less than R2 - for (unsigned i = BitBegin; i != BitEnd; ++i) { - bool V1 = getBitValue(R1, i), V2 = getBitValue(R2, i); - if (V1 < V2) - return true; - else if (V2 < V1) - return false; - } - return false; - } -}; +static SourceMgr SrcMgr; -static void PrintRange(std::vector::iterator I, - std::vector::iterator E) { - while (I != E) std::cerr << **I++; +void llvm::PrintError(SMLoc ErrorLoc, const std::string &Msg) { + SrcMgr.PrintMessage(ErrorLoc, Msg, "error"); } -static bool getMemoryBit(unsigned char *M, unsigned i) { - return (M[i/8] & (1 << (i&7))) != 0; -} -static unsigned getFirstFixedBitInSequence(std::vector::iterator IB, - std::vector::iterator IE, - unsigned StartBit) { - unsigned FirstFixedBit = 0; - for (std::vector::iterator I = IB; I != IE; ++I) - FirstFixedBit = std::max(FirstFixedBit, getFirstFixedBit(*I, StartBit)); - return FirstFixedBit; -} -// ParseMachineCode - Try to split the vector of instructions (which is -// intentially taken by-copy) in half, narrowing down the possible instructions -// that we may have found. Eventually, this list will get pared down to zero or -// one instruction, in which case we have a match or failure. -// -static Record *ParseMachineCode(std::vector::iterator InstsB, - std::vector::iterator InstsE, - unsigned char *M) { - assert(InstsB != InstsE && "Empty range?"); - if (InstsB+1 == InstsE) { - // Only a single instruction, see if we match it... - Record *Inst = *InstsB; - for (unsigned i = 0, e = getNumBits(Inst); i != e; ++i) - if (BitInit *BI = dynamic_cast(getBit(Inst, i))) - if (getMemoryBit(M, i) != BI->getValue()) - return 0; - return Inst; +/// ParseFile - this function begins the parsing of the specified tablegen +/// file. +static bool ParseFile(const std::string &Filename, + const std::vector &IncludeDirs, + SourceMgr &SrcMgr) { + std::string ErrorStr; + MemoryBuffer *F = MemoryBuffer::getFileOrSTDIN(Filename.c_str(), &ErrorStr); + if (F == 0) { + errs() << "Could not open input file '" << Filename << "': " + << ErrorStr <<"\n"; + return true; } - - unsigned MaxBits = ~0; - for (std::vector::iterator I = InstsB; I != InstsE; ++I) - MaxBits = std::min(MaxBits, getNumBits(*I)); - - unsigned FirstFixedBit = getFirstFixedBitInSequence(InstsB, InstsE, 0); - unsigned FirstVaryingBit, LastFixedBit; - do { - FirstVaryingBit = ~0; - LastFixedBit = ~0; - for (std::vector::iterator I = InstsB+1; I != InstsE; ++I) - FindInstDifferences(*InstsB, *I, FirstFixedBit, MaxBits, - FirstVaryingBit, LastFixedBit); - if (FirstVaryingBit == MaxBits) { - std::cerr << "ERROR: Could not find bit to distinguish between " - << "the following entries!\n"; - PrintRange(InstsB, InstsE); - } - -#if 0 - std::cerr << "FVB: " << FirstVaryingBit << " - " << LastFixedBit - << ": " << InstsE-InstsB << "\n"; -#endif - - FirstFixedBit = getFirstFixedBitInSequence(InstsB, InstsE, FirstVaryingBit); - } while (FirstVaryingBit != FirstFixedBit); - - //std::cerr << "\n\nXXXXXXXXXXXXXXXXX\n\n"; - //PrintRange(InstsB, InstsE); - - // Sort the Insts list so that the entries have all of the bits in the range - // [FirstVaryingBit,LastFixedBit) sorted. These bits are all guaranteed to be - // set to either 0 or 1 (BitInit values), which simplifies things. - // - std::sort(InstsB, InstsE, BitComparator(FirstVaryingBit, LastFixedBit)); - - // Once the list is sorted by these bits, split the bit list into smaller - // lists, and recurse on each one. - // - std::vector::iterator RangeBegin = InstsB; - Record *Match = 0; - while (RangeBegin != InstsE) { - std::vector::iterator RangeEnd = RangeBegin+1; - while (RangeEnd != InstsE && - BitRangesEqual(*RangeBegin, *RangeEnd, FirstVaryingBit, LastFixedBit)) - ++RangeEnd; - - // We just identified a range of equal instructions. If this range is the - // input range, we were not able to distinguish between the instructions in - // the set. Print an error and exit! - // - if (RangeBegin == InstsB && RangeEnd == InstsE) { - std::cerr << "Error: Could not distinguish among the following insts!:\n"; - PrintRange(InstsB, InstsE); - abort(); - } - - if (Record *R = ParseMachineCode(RangeBegin, RangeEnd, M)) { - if (Match) { - std::cerr << "Error: Multiple matches found:\n"; - PrintRange(InstsB, InstsE); - } - - assert(Match == 0 && "Multiple matches??"); - Match = R; - } - RangeBegin = RangeEnd; - } - - return Match; -} - -static void PrintValue(Record *I, unsigned char *Ptr, const RecordVal &Val) { - assert(dynamic_cast(Val.getValue()) && - "Can only handle undefined bits<> types!"); - BitsInit *BI = (BitsInit*)Val.getValue(); - assert(BI->getNumBits() <= 32 && "Can only handle fields up to 32 bits!"); - - unsigned Value = 0; - const std::vector &Vals = I->getValues(); - - // Start by filling in fixed values... - for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) - if (BitInit *B = dynamic_cast(BI->getBit(i))) - Value |= B->getValue() << i; - - // Loop over all of the fields in the instruction adding in any - // contributions to this value (due to bit references). - // - unsigned Offset = 0; - for (unsigned f = 0, e = Vals.size(); f != e; ++f) - if (Vals[f].getPrefix()) { - BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue(); - if (&Vals[f] == &Val) { - // Read the bits directly now... - for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) - Value |= getMemoryBit(Ptr, Offset+i) << i; - break; - } - - // Scan through the field looking for bit initializers of the current - // variable... - for (unsigned i = 0, e = FieldInitializer->getNumBits(); i != e; ++i) - if (VarBitInit *VBI = - dynamic_cast(FieldInitializer->getBit(i))) { - TypedInit *TI = VBI->getVariable(); - if (VarInit *VI = dynamic_cast(TI)) { - if (VI->getName() == Val.getName()) - Value |= getMemoryBit(Ptr, Offset+i) << VBI->getBitNum(); - } else if (FieldInit *FI = dynamic_cast(TI)) { - // FIXME: implement this! - std::cerr << "FIELD INIT not implemented yet!\n"; - } - } - Offset += FieldInitializer->getNumBits(); - } - - std::cout << "0x" << std::hex << Value << std::dec; -} - -static void PrintInstruction(Record *I, unsigned char *Ptr) { - std::cout << "Inst " << getNumBits(I)/8 << " bytes: " - << "\t" << I->getName() << "\t" << *I->getValue("Name")->getValue() - << "\t"; - - const std::vector &Vals = I->getValues(); - for (unsigned i = 0, e = Vals.size(); i != e; ++i) - if (!Vals[i].getValue()->isComplete()) { - std::cout << Vals[i].getName() << "="; - PrintValue(I, Ptr, Vals[i]); - std::cout << "\t"; - } - std::cout << "\n";// << *I; -} + // Tell SrcMgr about this buffer, which is what TGParser will pick up. + SrcMgr.AddNewSourceBuffer(F, SMLoc()); -static void ParseMachineCode() { - unsigned char Buffer[] = { 0x55, // push EBP - 0x89, 0xE5, // mov EBP, ESP - //0x83, 0xEC, 0x08, // sub ESP, 0x8 - 0xE8, 1, 2, 3, 4, // call +0x04030201 - 0x89, 0xEC, // mov ESP, EBP - 0x5D, // pop EBP - 0xC3, // ret - 0x90, // nop - 0xC9, // leave - 0x89, 0xF6, // mov ESI, ESI - 0xB8, 1, 2, 3, 4, // mov EAX, 0x04030201 - 0x68, 1, 2, 3, 4, // push 0x04030201 - 0x5e, // pop ESI - 0xFF, 0xD0, // call EAX - 0x85, 0xC0, // test EAX, EAX - 0xF4, // hlt - }; + // Record the location of the include directory so that the lexer can find + // it later. + SrcMgr.setIncludeDirs(IncludeDirs); - std::vector Insts; - - const std::map &Defs = Records.getDefs(); - Record *Inst = Records.getClass("Instruction"); - assert(Inst && "Couldn't find Instruction class!"); - - for (std::map::const_iterator I = Defs.begin(), - E = Defs.end(); I != E; ++I) - if (I->second->isSubClassOf(Inst)) - Insts.push_back(I->second); - - unsigned char *BuffPtr = Buffer; - while (1) { - Record *R = ParseMachineCode(Insts.begin(), Insts.end(), BuffPtr); - if (R == 0) { - std::cout << "Parse failed!\n"; - return; - } - PrintInstruction(R, BuffPtr); + TGParser Parser(SrcMgr); - unsigned Bits = getNumBits(R); - assert((Bits & 7) == 0 && "Instruction is not an even number of bytes!"); - BuffPtr += Bits/8; - } + return Parser.ParseFile(); } - int main(int argc, char **argv) { + sys::PrintStackTraceOnErrorSignal(); + PrettyStackTraceProgram X(argc, argv); cl::ParseCommandLineOptions(argc, argv); - ParseFile(); - if (Parse) { - ParseMachineCode(); - return 0; + + // Parse the input file. + if (ParseFile(InputFilename, IncludeDirs, SrcMgr)) + return 1; + + raw_ostream *Out = &outs(); + if (OutputFilename != "-") { + std::string Error; + Out = new raw_fd_ostream(OutputFilename.c_str(), Error); + + if (!Error.empty()) { + errs() << argv[0] << ": error opening " << OutputFilename + << ":" << Error << "\n"; + return 1; + } + + // Make sure the file gets removed if *gasp* tablegen crashes... + sys::RemoveFileOnSignal(sys::Path(OutputFilename)); } - if (Class == "") { - std::cout << Records; // No argument, dump all contents - } else { - Record *R = Records.getClass(Class); - if (R == 0) { - std::cerr << "Cannot find class '" << Class << "'!\n"; - abort(); + try { + switch (Action) { + case PrintRecords: + *Out << Records; // No argument, dump all contents + break; + case GenEmitter: + CodeEmitterGen(Records).run(*Out); + break; + + case GenRegisterEnums: + RegisterInfoEmitter(Records).runEnums(*Out); + break; + case GenRegister: + RegisterInfoEmitter(Records).run(*Out); + break; + case GenRegisterHeader: + RegisterInfoEmitter(Records).runHeader(*Out); + break; + case GenInstrEnums: + InstrEnumEmitter(Records).run(*Out); + break; + case GenInstrs: + InstrInfoEmitter(Records).run(*Out); + break; + case GenCallingConv: + CallingConvEmitter(Records).run(*Out); + break; + case GenAsmWriter: + AsmWriterEmitter(Records).run(*Out); + break; + case GenAsmMatcher: + AsmMatcherEmitter(Records).run(*Out); + break; + case GenClangDiagsDefs: + ClangDiagsDefsEmitter(Records, ClangComponent).run(*Out); + break; + case GenClangDiagGroups: + ClangDiagGroupsEmitter(Records).run(*Out); + break; + case GenDisassembler: + DisassemblerEmitter(Records).run(*Out); + break; + case GenOptParserDefs: + OptParserEmitter(Records, true).run(*Out); + break; + case GenOptParserImpl: + OptParserEmitter(Records, false).run(*Out); + break; + case GenDAGISel: + DAGISelEmitter(Records).run(*Out); + break; + case GenFastISel: + FastISelEmitter(Records).run(*Out); + break; + case GenSubtarget: + SubtargetEmitter(Records).run(*Out); + break; + case GenIntrinsic: + IntrinsicEmitter(Records).run(*Out); + break; + case GenTgtIntrinsic: + IntrinsicEmitter(Records, true).run(*Out); + break; + case GenLLVMCConf: + LLVMCConfigurationEmitter(Records).run(*Out); + break; + case GenEDHeader: + EDEmitter(Records).runHeader(*Out); + break; + case GenEDInfo: + EDEmitter(Records).run(*Out); + break; + case PrintEnums: + { + std::vector Recs = Records.getAllDerivedDefinitions(Class); + for (unsigned i = 0, e = Recs.size(); i != e; ++i) + *Out << Recs[i]->getName() << ", "; + *Out << "\n"; + break; } - - const std::map &Defs = Records.getDefs(); - for (std::map::const_iterator I = Defs.begin(), - E = Defs.end(); I != E; ++I) { - if (I->second->isSubClassOf(R)) { - std::cout << I->first << ", "; - } + default: + assert(1 && "Invalid Action"); + return 1; } - std::cout << "\n"; + + if (Out != &outs()) + delete Out; // Close the file + return 0; + + } catch (const TGError &Error) { + errs() << argv[0] << ": error:\n"; + PrintError(Error.getLoc(), Error.getMessage()); + + } catch (const std::string &Error) { + errs() << argv[0] << ": " << Error << "\n"; + } catch (const char *Error) { + errs() << argv[0] << ": " << Error << "\n"; + } catch (...) { + errs() << argv[0] << ": Unknown unexpected exception occurred.\n"; + } + + if (Out != &outs()) { + delete Out; // Close the file + std::remove(OutputFilename.c_str()); // Remove the file, it's broken } - return 0; + return 1; }