X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FCodeGenTarget.cpp;h=aaad4225ace884f6608a9cf88d2a658be4e0df72;hb=cd0aefe26fed244e0e7057e82cd7cac636894519;hp=de00dc6407ebe942a040f806f097ad307d925cbc;hpb=095734c578c74f6d1b1fcbdc4d4264a059cdb9ee;p=oota-llvm.git diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index de00dc6407e..aaad4225ace 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -57,6 +57,7 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) { case MVT::i32: return "MVT::i32"; case MVT::i64: return "MVT::i64"; case MVT::i128: return "MVT::i128"; + case MVT::Any: return "MVT::Any"; case MVT::iAny: return "MVT::iAny"; case MVT::fAny: return "MVT::fAny"; case MVT::vAny: return "MVT::vAny"; @@ -75,6 +76,8 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) { case MVT::v16i1: return "MVT::v16i1"; case MVT::v32i1: return "MVT::v32i1"; case MVT::v64i1: return "MVT::v64i1"; + case MVT::v512i1: return "MVT::v512i1"; + case MVT::v1024i1: return "MVT::v1024i1"; case MVT::v1i8: return "MVT::v1i8"; case MVT::v2i8: return "MVT::v2i8"; case MVT::v4i8: return "MVT::v4i8"; @@ -82,22 +85,30 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) { case MVT::v16i8: return "MVT::v16i8"; case MVT::v32i8: return "MVT::v32i8"; case MVT::v64i8: return "MVT::v64i8"; + case MVT::v128i8: return "MVT::v128i8"; + case MVT::v256i8: return "MVT::v256i8"; case MVT::v1i16: return "MVT::v1i16"; case MVT::v2i16: return "MVT::v2i16"; case MVT::v4i16: return "MVT::v4i16"; case MVT::v8i16: return "MVT::v8i16"; case MVT::v16i16: return "MVT::v16i16"; case MVT::v32i16: return "MVT::v32i16"; + case MVT::v64i16: return "MVT::v64i16"; + case MVT::v128i16: return "MVT::v128i16"; case MVT::v1i32: return "MVT::v1i32"; case MVT::v2i32: return "MVT::v2i32"; case MVT::v4i32: return "MVT::v4i32"; case MVT::v8i32: return "MVT::v8i32"; case MVT::v16i32: return "MVT::v16i32"; + case MVT::v32i32: return "MVT::v32i32"; + case MVT::v64i32: return "MVT::v64i32"; case MVT::v1i64: return "MVT::v1i64"; case MVT::v2i64: return "MVT::v2i64"; case MVT::v4i64: return "MVT::v4i64"; case MVT::v8i64: return "MVT::v8i64"; case MVT::v16i64: return "MVT::v16i64"; + case MVT::v32i64: return "MVT::v32i64"; + case MVT::v1i128: return "MVT::v1i128"; case MVT::v2f16: return "MVT::v2f16"; case MVT::v4f16: return "MVT::v4f16"; case MVT::v8f16: return "MVT::v8f16"; @@ -110,6 +121,7 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) { case MVT::v2f64: return "MVT::v2f64"; case MVT::v4f64: return "MVT::v4f64"; case MVT::v8f64: return "MVT::v8f64"; + case MVT::token: return "MVT::token"; case MVT::Metadata: return "MVT::Metadata"; case MVT::iPTR: return "MVT::iPTR"; case MVT::iPTRAny: return "MVT::iPTRAny"; @@ -133,7 +145,7 @@ std::string llvm::getQualifiedName(const Record *R) { /// getTarget - Return the current instance of the Target class. /// CodeGenTarget::CodeGenTarget(RecordKeeper &records) - : Records(records), RegBank(nullptr), SchedModels(nullptr) { + : Records(records) { std::vector Targets = Records.getAllDerivedDefinitions("Target"); if (Targets.size() == 0) PrintFatalError("ERROR: No 'Target' subclasses defined!"); @@ -143,9 +155,6 @@ CodeGenTarget::CodeGenTarget(RecordKeeper &records) } CodeGenTarget::~CodeGenTarget() { - DeleteContainerSeconds(Instructions); - delete RegBank; - delete SchedModels; } const std::string &CodeGenTarget::getName() const { @@ -153,11 +162,11 @@ const std::string &CodeGenTarget::getName() const { } std::string CodeGenTarget::getInstNamespace() const { - for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { + for (const CodeGenInstruction *Inst : instructions()) { // Make sure not to pick up "TargetOpcode" by accidentally getting // the namespace off the PHI instruction or something. - if ((*i)->Namespace != "TargetOpcode") - return (*i)->Namespace; + if (Inst->Namespace != "TargetOpcode") + return Inst->Namespace; } return ""; @@ -211,7 +220,7 @@ Record *CodeGenTarget::getAsmWriter() const { CodeGenRegBank &CodeGenTarget::getRegBank() const { if (!RegBank) - RegBank = new CodeGenRegBank(Records); + RegBank = llvm::make_unique(Records); return *RegBank; } @@ -234,9 +243,7 @@ std::vector CodeGenTarget:: getRegisterVTs(Record *R) const { const CodeGenRegister *Reg = getRegBank().getReg(R); std::vector Result; - ArrayRef RCs = getRegBank().getRegClasses(); - for (unsigned i = 0, e = RCs.size(); i != e; ++i) { - const CodeGenRegisterClass &RC = *RCs[i]; + for (const auto &RC : getRegBank().getRegClasses()) { if (RC.contains(Reg)) { ArrayRef InVTs = RC.getValueTypes(); Result.insert(Result.end(), InVTs.begin(), InVTs.end()); @@ -251,13 +258,11 @@ getRegisterVTs(Record *R) const { void CodeGenTarget::ReadLegalValueTypes() const { - ArrayRef RCs = getRegBank().getRegClasses(); - for (unsigned i = 0, e = RCs.size(); i != e; ++i) - for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri) - LegalValueTypes.push_back(RCs[i]->VTs[ri]); + for (const auto &RC : getRegBank().getRegClasses()) + LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end()); // Remove duplicates. - std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); + array_pod_sort(LegalValueTypes.begin(), LegalValueTypes.end()); LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), LegalValueTypes.end()), LegalValueTypes.end()); @@ -265,7 +270,7 @@ void CodeGenTarget::ReadLegalValueTypes() const { CodeGenSchedModels &CodeGenTarget::getSchedModels() const { if (!SchedModels) - SchedModels = new CodeGenSchedModels(Records, *this); + SchedModels = llvm::make_unique(Records, *this); return *SchedModels; } @@ -276,20 +281,20 @@ void CodeGenTarget::ReadInstructions() const { // Parse the instructions defined in the .td file. for (unsigned i = 0, e = Insts.size(); i != e; ++i) - Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]); + Instructions[Insts[i]] = llvm::make_unique(Insts[i]); } static const CodeGenInstruction * GetInstByName(const char *Name, - const DenseMap &Insts, + const DenseMap> &Insts, RecordKeeper &Records) { const Record *Rec = Records.getDef(Name); - DenseMap::const_iterator - I = Insts.find(Rec); + const auto I = Insts.find(Rec); if (!Rec || I == Insts.end()) PrintFatalError(Twine("Could not find '") + Name + "' instruction!"); - return I->second; + return I->second.get(); } /// \brief Return all of the instructions defined by the target, ordered by @@ -301,8 +306,10 @@ void CodeGenTarget::ComputeInstrsByEnum() const { "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG", "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE", "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START", - "LIFETIME_END", "STACKMAP", "PATCHPOINT", nullptr}; - const DenseMap &Insts = getInstructions(); + "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD", + "STATEPOINT", "LOCAL_ESCAPE", "FAULTING_LOAD_OP", + nullptr}; + const auto &Insts = getInstructions(); for (const char *const *p = FixedInstrs; *p; ++p) { const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); assert(Instr && "Missing target independent instruction"); @@ -311,9 +318,8 @@ void CodeGenTarget::ComputeInstrsByEnum() const { } unsigned EndOfPredefines = InstrsByEnum.size(); - for (DenseMap::const_iterator - I = Insts.begin(), E = Insts.end(); I != E; ++I) { - const CodeGenInstruction *CGI = I->second; + for (const auto &I : Insts) { + const CodeGenInstruction *CGI = I.second.get(); if (CGI->Namespace != "TargetOpcode") InstrsByEnum.push_back(CGI); } @@ -343,9 +349,7 @@ void CodeGenTarget::reverseBitsForLittleEndianEncoding() { return; std::vector Insts = Records.getAllDerivedDefinitions("Instruction"); - for (std::vector::iterator I = Insts.begin(), E = Insts.end(); - I != E; ++I) { - Record *R = *I; + for (Record *R : Insts) { if (R->getValueAsString("Namespace") == "TargetOpcode" || R->getValueAsBit("isPseudo")) continue; @@ -417,9 +421,9 @@ ComplexPattern::ComplexPattern(Record *R) { } else if (PropList[i]->getName() == "SDNPWantParent") { Properties |= 1 << SDNPWantParent; } else { - errs() << "Unsupported SD Node property '" << PropList[i]->getName() - << "' on ComplexPattern '" << R->getName() << "'!\n"; - exit(1); + PrintFatalError("Unsupported SD Node property '" + + PropList[i]->getName() + "' on ComplexPattern '" + + R->getName() + "'!"); } } @@ -450,6 +454,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { canThrow = false; isNoReturn = false; isNoDuplicate = false; + isConvergent = false; if (DefName.size() <= 4 || std::string(DefName.begin(), DefName.begin() + 4) != "int_") @@ -459,6 +464,8 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); + if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field. + MSBuiltinName = R->getValueAsString("MSBuiltinName"); TargetPrefix = R->getValueAsString("TargetPrefix"); Name = R->getValueAsString("LLVMName"); @@ -489,7 +496,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // Parse the list of return types. std::vector OverloadedVTs; ListInit *TypeList = R->getValueAsListInit("RetTypes"); - for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = TypeList->size(); i != e; ++i) { Record *TyEl = TypeList->getElementAsRecord(i); assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); MVT::SimpleValueType VT; @@ -523,7 +530,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // Parse the list of parameter types. TypeList = R->getValueAsListInit("ParamTypes"); - for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = TypeList->size(); i != e; ++i) { Record *TyEl = TypeList->getElementAsRecord(i); assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); MVT::SimpleValueType VT; @@ -536,7 +543,9 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // variants with iAny types; otherwise, if the intrinsic is not // overloaded, all the types can be specified directly. assert(((!TyEl->isSubClassOf("LLVMExtendedType") && - !TyEl->isSubClassOf("LLVMTruncatedType")) || + !TyEl->isSubClassOf("LLVMTruncatedType") && + !TyEl->isSubClassOf("LLVMVectorSameWidth") && + !TyEl->isSubClassOf("LLVMPointerToElt")) || VT == MVT::iAny || VT == MVT::vAny) && "Expected iAny or vAny type"); } else @@ -557,7 +566,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // Parse the intrinsic properties. ListInit *PropList = R->getValueAsListInit("Properties"); - for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = PropList->size(); i != e; ++i) { Record *Property = PropList->getElementAsRecord(i); assert(Property->isSubClassOf("IntrinsicProperty") && "Expected a property!"); @@ -576,6 +585,8 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { canThrow = true; else if (Property->getName() == "IntrNoDuplicate") isNoDuplicate = true; + else if (Property->getName() == "IntrConvergent") + isConvergent = true; else if (Property->getName() == "IntrNoReturn") isNoReturn = true; else if (Property->isSubClassOf("NoCapture")) {