X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FX86%2Ftest-shrink.ll;h=5bc28ecbc48c80996340a8ea740bc883dde45490;hb=94657b6f8a6a21147363204cc922b4794419611b;hp=bbf727a45a5b140c162a1dc2f4aa3f15e07bc523;hpb=6a402dc952ccad3f8fd0d9e272dbdd261f50854e;p=oota-llvm.git

diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll
index bbf727a45a5..5bc28ecbc48 100644
--- a/test/CodeGen/X86/test-shrink.ll
+++ b/test/CodeGen/X86/test-shrink.ll
@@ -1,8 +1,9 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
 
 ; CHECK-64: g64xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
 ; CHECK-32: g64xh:
 ; CHECK-32:   testb $8, %ah
@@ -19,7 +20,7 @@ no:
   ret void
 }
 ; CHECK-64: g64xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64:   testb $8, [[A0L:%dil|%cl]]
 ; CHECK-64:   ret
 ; CHECK-32: g64xl:
 ; CHECK-32:   testb $8, %al
@@ -36,7 +37,7 @@ no:
   ret void
 }
 ; CHECK-64: g32xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
 ; CHECK-32: g32xh:
 ; CHECK-32:   testb $8, %ah
@@ -53,7 +54,7 @@ no:
   ret void
 }
 ; CHECK-64: g32xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64:   testb $8, [[A0L]]
 ; CHECK-64:   ret
 ; CHECK-32: g32xl:
 ; CHECK-32:   testb $8, %al
@@ -70,7 +71,7 @@ no:
   ret void
 }
 ; CHECK-64: g16xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
 ; CHECK-32: g16xh:
 ; CHECK-32:   testb $8, %ah
@@ -87,7 +88,7 @@ no:
   ret void
 }
 ; CHECK-64: g16xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64:   testb $8, [[A0L]]
 ; CHECK-64:   ret
 ; CHECK-32: g16xl:
 ; CHECK-32:   testb $8, %al
@@ -104,10 +105,10 @@ no:
   ret void
 }
 ; CHECK-64: g64x16:
-; CHECK-64:   testw $32896, %di
+; CHECK-64:   testw $-32640, %[[A0W:di|cx]]
 ; CHECK-64:   ret
 ; CHECK-32: g64x16:
-; CHECK-32:   testw $32896, %ax
+; CHECK-32:   testw $-32640, %ax
 ; CHECK-32:   ret
 define void @g64x16(i64 inreg %x) nounwind {
   %t = and i64 %x, 32896
@@ -121,10 +122,10 @@ no:
   ret void
 }
 ; CHECK-64: g32x16:
-; CHECK-64:   testw $32896, %di
+; CHECK-64:   testw $-32640, %[[A0W]]
 ; CHECK-64:   ret
 ; CHECK-32: g32x16:
-; CHECK-32:   testw $32896, %ax
+; CHECK-32:   testw $-32640, %ax
 ; CHECK-32:   ret
 define void @g32x16(i32 inreg %x) nounwind {
   %t = and i32 %x, 32896
@@ -138,7 +139,7 @@ no:
   ret void
 }
 ; CHECK-64: g64x32:
-; CHECK-64:   testl $268468352, %edi
+; CHECK-64:   testl $268468352, %e[[A0W]]
 ; CHECK-64:   ret
 ; CHECK-32: g64x32:
 ; CHECK-32:   testl $268468352, %eax