X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FX86%2Finline-asm-q-regs.ll;h=53a56aee2cb3858e38367f7115580e1fec57930f;hb=e2995ff88f922cd9004ef6cae7b444b615808c0e;hp=ab44206f8065a07864d374411c29bec62f5b8078;hpb=36a0947820fd4aa4b8a5fa26e3f079bdf572bc81;p=oota-llvm.git

diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll
index ab44206f806..53a56aee2cb 100644
--- a/test/CodeGen/X86/inline-asm-q-regs.ll
+++ b/test/CodeGen/X86/inline-asm-q-regs.ll
@@ -1,10 +1,37 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as
 ; rdar://7066579
 
-	type { i64, i64, i64, i64, i64 }		; type %0
+	%0 = type { i64, i64, i64, i64, i64 }		; type %0
 
-define void @t() nounwind {
+define void @test1() nounwind {
 entry:
 	%asmtmp = call %0 asm sideeffect "mov    %cr0, $0       \0Amov    %cr2, $1       \0Amov    %cr3, $2       \0Amov    %cr4, $3       \0Amov    %cr8, $0       \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind		; <%0> [#uses=0]
 	ret void
 }
+
+; PR9602
+define void @test2(float %tmp) nounwind {
+  call void asm sideeffect "$0", "q"(float %tmp) nounwind
+  call void asm sideeffect "$0", "Q"(float %tmp) nounwind
+  ret void
+}
+
+define void @test3(double %tmp) nounwind {
+  call void asm sideeffect "$0", "q"(double %tmp) nounwind
+  ret void
+}
+
+; rdar://10392864
+define void @test4(i8 signext %val, i8 signext %a, i8 signext %b, i8 signext %c, i8 signext %d) nounwind {
+entry:
+  %0 = tail call { i8, i8, i8, i8, i8 } asm "foo $1, $2, $3, $4, $1\0Axchgb ${0:b}, ${0:h}", "=q,={ax},={bx},={cx},={dx},0,1,2,3,4,~{dirflag},~{fpsr},~{flags}"(i8 %val, i8 %a, i8 %b, i8 %c, i8 %d) nounwind
+  ret void
+}
+
+; rdar://10614894
+define <8 x float> @test5(<8 x float> %a, <8 x float> %b) nounwind {
+entry:
+  %0 = tail call <8 x float> asm "vperm2f128 $3, $2, $1, $0", "=x,x,x,i,~{dirflag},~{fpsr},~{flags}"(<8 x float> %a, <8 x float> %b, i32 16) nounwind
+  ret <8 x float> %0
+}
+