X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FX86%2Fcommute-two-addr.ll;h=ef44a3d119b8aa5953629bff04f35ece37b945fa;hb=4243e67bd5eeae930060824d4290f8071a66e28f;hp=c181354784d3895d1a154418499a10a844d52fea;hpb=b1576f56c8e8ec7afb49e4af77f7f5871f1b52ec;p=oota-llvm.git diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll index c181354784d..ef44a3d119b 100644 --- a/test/CodeGen/X86/commute-two-addr.ll +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -2,24 +2,61 @@ ; insertion of register-register copies. ; Make sure there are only 3 mov's for each testcase -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {\\\} | wc -l | grep 6 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN -target triple = "i686-pc-linux-gnu" +@G = external global i32 ; [#uses=2] -%G = external global int +declare void @ext(i32) -declare void %ext(int) +define i32 @t1(i32 %X, i32 %Y) nounwind { +; LINUX: t1: +; LINUX: movl 4(%esp), %eax +; LINUX: movl 8(%esp), %ecx +; LINUX: addl %eax, %ecx +; LINUX: movl %ecx, G + %Z = add i32 %X, %Y ; [#uses=1] + store i32 %Z, i32* @G + ret i32 %X +} -int %add_test(int %X, int %Y) { - %Z = add int %X, %Y ;; Last use of Y, but not of X. - store int %Z, int* %G - ret int %X +define i32 @t2(i32 %X, i32 %Y) nounwind { +; LINUX: t2: +; LINUX: movl 4(%esp), %eax +; LINUX: movl 8(%esp), %ecx +; LINUX: xorl %eax, %ecx +; LINUX: movl %ecx, G + %Z = xor i32 %X, %Y ; [#uses=1] + store i32 %Z, i32* @G + ret i32 %X } -int %xor_test(int %X, int %Y) { - %Z = xor int %X, %Y ;; Last use of Y, but not of X. - store int %Z, int* %G - ret int %X +; rdar://8762995 +%0 = type { i64, i32 } + +define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind { +entry: +; DARWIN: t3: +; DARWIN: shll $16 +; DARWIN: shlq $32, %rcx +; DARWIN-NOT: leaq +; DARWIN: orq %rcx, %rax + %tmp21 = zext i32 %lb to i64 + %tmp23 = zext i32 %ub to i64 + %tmp24 = shl i64 %tmp23, 32 + %ins26 = or i64 %tmp24, %tmp21 + %tmp28 = zext i8 %has_lb to i32 + %tmp33 = zext i8 %has_ub to i32 + %tmp34 = shl i32 %tmp33, 8 + %tmp38 = zext i8 %lb_inclusive to i32 + %tmp39 = shl i32 %tmp38, 16 + %tmp43 = zext i8 %ub_inclusive to i32 + %tmp44 = shl i32 %tmp43, 24 + %ins31 = or i32 %tmp39, %tmp28 + %ins36 = or i32 %ins31, %tmp34 + %ins46 = or i32 %ins36, %tmp44 + %tmp16 = insertvalue %0 undef, i64 %ins26, 0 + %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1 + ret %0 %tmp19 }