X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FXCore%2FXCoreRegisterInfo.cpp;h=1cfb57dc3af3073f604bb96686f113476fb3fbf3;hb=1422e1f158810323cfbe06d9242ba35c3f674921;hp=9fb2c7bf8175f0758aa5c4c36e8f558dbe9f0eec;hpb=9f85dccfc64b5f0b0c63ddfa0a42d8615aa1fcb3;p=oota-llvm.git diff --git a/lib/Target/XCore/XCoreRegisterInfo.cpp b/lib/Target/XCore/XCoreRegisterInfo.cpp index 9fb2c7bf817..1cfb57dc3af 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.cpp +++ b/lib/Target/XCore/XCoreRegisterInfo.cpp @@ -99,7 +99,7 @@ static void InsertFPConstInst(MachineBasicBlock::iterator II, MachineBasicBlock &MBB = *MI.getParent(); DebugLoc dl = MI.getDebugLoc(); unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); - RS->setUsed(ScratchOffset); + RS->setRegUsed(ScratchOffset); TII.loadImmediate(MBB, II, ScratchOffset, Offset); switch (MI.getOpcode()) { @@ -171,12 +171,12 @@ static void InsertSPConstInst(MachineBasicBlock::iterator II, unsigned ScratchBase; if (OpCode==XCore::STWFI) { ScratchBase = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); - RS->setUsed(ScratchBase); + RS->setRegUsed(ScratchBase); } else ScratchBase = Reg; BuildMI(MBB, II, dl, TII.get(XCore::LDAWSP_ru6), ScratchBase).addImm(0); unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); - RS->setUsed(ScratchOffset); + RS->setRegUsed(ScratchOffset); TII.loadImmediate(MBB, II, ScratchOffset, Offset); switch (OpCode) { @@ -208,8 +208,8 @@ bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) { MF.getFunction()->needsUnwindTableEntry(); } -const MCPhysReg* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) - const { +const MCPhysReg * +XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { // The callee saved registers LR & FP are explicitly handled during // emitPrologue & emitEpilogue and related functions. static const MCPhysReg CalleeSavedRegs[] = { @@ -222,8 +222,7 @@ const MCPhysReg* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF XCore::R8, XCore::R9, 0 }; - const TargetFrameLowering *TFI = - MF->getTarget().getSubtargetImpl()->getFrameLowering(); + const XCoreFrameLowering *TFI = getFrameLowering(*MF); if (TFI->hasFP(*MF)) return CalleeSavedRegsFP; return CalleeSavedRegs; @@ -231,8 +230,7 @@ const MCPhysReg* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); - const TargetFrameLowering *TFI = - MF.getTarget().getSubtargetImpl()->getFrameLowering(); + const XCoreFrameLowering *TFI = getFrameLowering(MF); Reserved.set(XCore::CP); Reserved.set(XCore::DP); @@ -270,11 +268,9 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, MachineFunction &MF = *MI.getParent()->getParent(); const XCoreInstrInfo &TII = - *static_cast( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); + *static_cast(MF.getSubtarget().getInstrInfo()); - const TargetFrameLowering *TFI = - MF.getTarget().getSubtargetImpl()->getFrameLowering(); + const XCoreFrameLowering *TFI = getFrameLowering(MF); int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); int StackSize = MF.getFrameInfo()->getStackSize(); @@ -328,8 +324,7 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, unsigned XCoreRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - const TargetFrameLowering *TFI = - MF.getTarget().getSubtargetImpl()->getFrameLowering(); + const XCoreFrameLowering *TFI = getFrameLowering(MF); return TFI->hasFP(MF) ? XCore::R10 : XCore::SP; }