X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86InstrInfo.td;h=359513c9487f900b19f3e58f07601db9a473c5fe;hb=02b8511364a61b559369d8dc36e82a486f42fec3;hp=11c67bff062b61fd5067f3aad07cb44abbc6e612;hpb=af9db75943c11eebd642c1645d3c3f4003fe37e3;p=oota-llvm.git diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 11c67bff062..359513c9487 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -228,11 +228,6 @@ class X86Inst opcod, Format f, ImmType i, dag ops, string AsmStr> bits<3> FPFormBits = 0; } -class Imp uses, list defs> { - list Uses = uses; - list Defs = defs; -} - // Prefix byte classes which are used to indicate to the ad-hoc machine code // emitter that various prefix bytes are required. @@ -346,11 +341,15 @@ class Ii32 o, Format f, dag ops, string asm, list pattern> // Instruction list... // +// ADJCALLSTACKDOWN/UP implicitly use/def ESP because they may be expanded into +// a stack adjustment and the codegen must know that they may modify the stack +// pointer before prolog-epilog rewriting occurs. def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN", - [(X86callseq_start imm:$amt)]>; + [(X86callseq_start imm:$amt)]>, Imp<[ESP],[ESP]>; def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2), "#ADJCALLSTACKUP", - [(X86callseq_end imm:$amt1, imm:$amt2)]>; + [(X86callseq_end imm:$amt1, imm:$amt2)]>, + Imp<[ESP],[ESP]>; def IMPLICIT_USE : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_USE", []>; def IMPLICIT_DEF : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_DEF", []>; def IMPLICIT_DEF_GR8 : I<0, Pseudo, (ops GR8:$dst), @@ -2452,9 +2451,9 @@ def DWARF_LOC : I<0, Pseudo, (ops i32imm:$line, i32imm:$col, i32imm:$file), [(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>; -def DWARF_LABEL : I<0, Pseudo, (ops i32imm:$id), - "\nLdebug_loc${id:debug}:", - [(dwarf_label (i32 imm:$id))]>; +def DWARF_LABEL : I<0, Pseudo, (ops i32imm:$id), + "\n${:private}debug_loc${id:debug}:", + [(dwarf_label (i32 imm:$id))]>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns @@ -2513,9 +2512,9 @@ def : Pat<(subc GR32:$src1, imm:$src2), def : Pat<(subc GR32:$src1, i32immSExt8:$src2), (SUB32ri8 GR32:$src1, i32immSExt8:$src2)>; -def : Pat<(truncstore (i8 imm:$src), addr:$dst, i1), +def : Pat<(truncstorei1 (i8 imm:$src), addr:$dst), (MOV8mi addr:$dst, imm:$src)>; -def : Pat<(truncstore GR8:$src, addr:$dst, i1), +def : Pat<(truncstorei1 GR8:$src, addr:$dst), (MOV8mr addr:$dst, GR8:$src)>; // Comparisons.