X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86InstrAVX512.td;h=995c5e40d5f9cd26571eb13b916857e7186e3db5;hb=fd52de369503a0531be3c0462918c70946d0677d;hp=622893bd730ddd62cd9d756f1828f12dc05f49a2;hpb=c2b5d999955dcf2d9ea1e4f8561260469fc9eb12;p=oota-llvm.git diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index 622893bd730..995c5e40d5f 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -4461,12 +4461,12 @@ def : Pat<(v8i64 (X86Shufp VR512:$src1, (memopv8i64 addr:$src2), (i8 imm:$imm))), (VSHUFPDZrmi VR512:$src1, addr:$src2, imm:$imm)>; -multiclass avx512_alignr { def rri : AVX512AIi8<0x03, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$src3), - !strconcat(OpcodeStr, + !strconcat("valign"##Suffix, " \t{$src3, $src2, $src1, $dst|" "$dst, $src1, $src2, $src3}"), [(set RC:$dst, @@ -4480,14 +4480,14 @@ multiclass avx512_alignr, EVEX_4V; } -defm VALIGND : avx512_alignr<"valignd", VR512, i512mem, v16i32, v16f32>, +defm VALIGND : avx512_alignr<"d", VR512, i512mem, v16i32, v16f32>, EVEX_V512, EVEX_CD8<32, CD8VF>; -defm VALIGNQ : avx512_alignr<"valignq", VR512, i512mem, v8i64, v8f64>, +defm VALIGNQ : avx512_alignr<"q", VR512, i512mem, v8i64, v8f64>, VEX_W, EVEX_V512, EVEX_CD8<64, CD8VF>; // Helper fragments to match sext vXi1 to vXiY.