X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86FloatingPoint.cpp;h=6f1d8e5237329d01a4f7315d30c571406ea994bb;hb=cf0db29df20d9c665da7e82bb261bdd7cf7f1b2b;hp=e74613b949868d53744e2eea638cd1b001632472;hpb=306030f8aa52ace8fd57a9b9aca06bedac3b32de;p=oota-llvm.git diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp index e74613b9498..6f1d8e52373 100644 --- a/lib/Target/X86/X86FloatingPoint.cpp +++ b/lib/Target/X86/X86FloatingPoint.cpp @@ -25,7 +25,6 @@ #include "X86.h" #include "X86InstrInfo.h" -#include "llvm/ADT/BitVector.h" #include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallPtrSet.h" @@ -33,10 +32,10 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/EdgeBundles.h" +#include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/Passes.h" #include "llvm/IR/InlineAsm.h" #include "llvm/Support/Debug.h" @@ -44,7 +43,9 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetSubtargetInfo.h" #include +#include using namespace llvm; #define DEBUG_TYPE "x86-codegen" @@ -278,7 +279,7 @@ namespace { void setKillFlags(MachineBasicBlock &MBB) const; }; char FPS::ID = 0; -} +} // namespace FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } @@ -299,7 +300,7 @@ bool FPS::runOnMachineFunction(MachineFunction &MF) { // function. If it is all integer, there is nothing for us to do! bool FPIsUsed = false; - assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!"); + static_assert(X86::FP6 == X86::FP0+6, "Register enums aren't sorted right!"); for (unsigned i = 0; i <= 6; ++i) if (MF.getRegInfo().isPhysRegUsed(X86::FP0+i)) { FPIsUsed = true; @@ -310,7 +311,7 @@ bool FPS::runOnMachineFunction(MachineFunction &MF) { if (!FPIsUsed) return false; Bundles = &getAnalysis(); - TII = MF.getTarget().getInstrInfo(); + TII = MF.getSubtarget().getInstrInfo(); // Prepare cross-MBB liveness. bundleCFG(MF); @@ -323,15 +324,13 @@ bool FPS::runOnMachineFunction(MachineFunction &MF) { MachineBasicBlock *Entry = MF.begin(); bool Changed = false; - for (df_ext_iterator > - I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed); - I != E; ++I) - Changed |= processBasicBlock(MF, **I); + for (MachineBasicBlock *BB : depth_first_ext(Entry, Processed)) + Changed |= processBasicBlock(MF, *BB); // Process any unreachable blocks in arbitrary order now. if (MF.size() != Processed.size()) for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB) - if (Processed.insert(BB)) + if (Processed.insert(BB).second) Changed |= processBasicBlock(MF, *BB); LiveBundles.clear(); @@ -439,7 +438,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { // Rewind to first instruction newly inserted. while (Start != BB.begin() && std::prev(Start) != PrevI) --Start; dbgs() << "Inserted instructions:\n\t"; - Start->print(dbgs(), &MF.getTarget()); + Start->print(dbgs()); while (++Start != std::next(I)) {} } dumpStack(); @@ -545,7 +544,7 @@ namespace { return V < TE.from; } }; -} +} // namespace #ifndef NDEBUG static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { @@ -835,7 +834,9 @@ FPS::freeStackSlotBefore(MachineBasicBlock::iterator I, unsigned FPRegNo) { RegMap[TopReg] = OldSlot; RegMap[FPRegNo] = ~0; Stack[--StackTop] = ~0; - return BuildMI(*MBB, I, DebugLoc(), TII->get(X86::ST_FPrr)).addReg(STReg); + return BuildMI(*MBB, I, DebugLoc(), TII->get(X86::ST_FPrr)) + .addReg(STReg) + .getInstr(); } /// adjustLiveRegs - Kill and revive registers such that exactly the FP @@ -897,7 +898,7 @@ void FPS::adjustLiveRegs(unsigned Mask, MachineBasicBlock::iterator I) { // Now we should have the correct registers live. DEBUG(dumpStack()); - assert(StackTop == CountPopulation_32(Mask) && "Live count mismatch"); + assert(StackTop == countPopulation(Mask) && "Live count mismatch"); } /// shuffleStackTop - emit fxch instructions before I to shuffle the top @@ -942,11 +943,11 @@ void FPS::handleCall(MachineBasicBlock::iterator &I) { } } - unsigned N = CountTrailingOnes_32(STReturns); + unsigned N = countTrailingOnes(STReturns); // FP registers used for function return must be consecutive starting at // FP0. - assert(STReturns == 0 || isMask_32(STReturns) && N <= 2); + assert(STReturns == 0 || (isMask_32(STReturns) && N <= 2)); for (unsigned I = 0; I < N; ++I) pushReg(N - I - 1); @@ -1296,11 +1297,11 @@ void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) { /// floating point instructions. This is primarily intended for use by pseudo /// instructions. /// -void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { - MachineInstr *MI = I; +void FPS::handleSpecialFP(MachineBasicBlock::iterator &Inst) { + MachineInstr *MI = Inst; if (MI->isCall()) { - handleCall(I); + handleCall(Inst); return; } @@ -1325,7 +1326,7 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { } else { // For COPY we just duplicate the specified value to a new stack slot. // This could be made better, but would require substantial changes. - duplicateToTop(SrcFP, DstFP, I); + duplicateToTop(SrcFP, DstFP, Inst); } break; } @@ -1334,7 +1335,7 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { // All FP registers must be explicitly defined, so load a 0 instead. unsigned Reg = MI->getOperand(0).getReg() - X86::FP0; DEBUG(dbgs() << "Emitting LD_F0 for implicit FP" << Reg << '\n'); - BuildMI(*MBB, I, MI->getDebugLoc(), TII->get(X86::LD_F0)); + BuildMI(*MBB, Inst, MI->getDebugLoc(), TII->get(X86::LD_F0)); pushReg(Reg); break; } @@ -1419,14 +1420,14 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { if (STUses && !isMask_32(STUses)) MI->emitError("fixed input regs must be last on the x87 stack"); - unsigned NumSTUses = CountTrailingOnes_32(STUses); + unsigned NumSTUses = countTrailingOnes(STUses); // Defs must be contiguous from the stack top. ST0-STn. if (STDefs && !isMask_32(STDefs)) { MI->emitError("output regs must be last on the x87 stack"); STDefs = NextPowerOf2(STDefs) - 1; } - unsigned NumSTDefs = CountTrailingOnes_32(STDefs); + unsigned NumSTDefs = countTrailingOnes(STDefs); // So must the clobbered stack slots. ST0-STm, m >= n. if (STClobbers && !isMask_32(STDefs | STClobbers)) @@ -1436,7 +1437,7 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { unsigned STPopped = STUses & (STDefs | STClobbers); if (STPopped && !isMask_32(STPopped)) MI->emitError("implicitly popped regs must be last on the x87 stack"); - unsigned NumSTPopped = CountTrailingOnes_32(STPopped); + unsigned NumSTPopped = countTrailingOnes(STPopped); DEBUG(dbgs() << "Asm uses " << NumSTUses << " fixed regs, pops " << NumSTPopped << ", and defines " << NumSTDefs << " regs.\n"); @@ -1476,7 +1477,7 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { for (unsigned I = 0; I < NumSTUses; ++I) STUsesArray[I] = I; - shuffleStackTop(STUsesArray, NumSTUses, I); + shuffleStackTop(STUsesArray, NumSTUses, Inst); DEBUG({dbgs() << "Before asm: "; dumpStack();}); // With the stack layout fixed, rewrite the FP registers. @@ -1511,7 +1512,7 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { while (FPKills) { unsigned FPReg = countTrailingZeros(FPKills); if (isLive(FPReg)) - freeStackSlotAfter(I, FPReg); + freeStackSlotAfter(Inst, FPReg); FPKills &= ~(1U << FPReg); } @@ -1527,12 +1528,12 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { Op.getReg() >= X86::FP0 && Op.getReg() <= X86::FP6); unsigned FPReg = getFPReg(Op); if (Op.isKill()) - moveToTop(FPReg, I); + moveToTop(FPReg, Inst); else - duplicateToTop(FPReg, FPReg, I); + duplicateToTop(FPReg, FPReg, Inst); // Emit the call. This will pop the operand. - BuildMI(*MBB, I, MI->getDebugLoc(), TII->get(X86::CALLpcrel32)) + BuildMI(*MBB, Inst, MI->getDebugLoc(), TII->get(X86::CALLpcrel32)) .addExternalSymbol("_ftol2") .addReg(X86::ST0, RegState::ImplicitKill) .addReg(X86::ECX, RegState::ImplicitDefine) @@ -1633,27 +1634,30 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { return; } - I = MBB->erase(I); // Remove the pseudo instruction + Inst = MBB->erase(Inst); // Remove the pseudo instruction // We want to leave I pointing to the previous instruction, but what if we // just erased the first instruction? - if (I == MBB->begin()) { + if (Inst == MBB->begin()) { DEBUG(dbgs() << "Inserting dummy KILL\n"); - I = BuildMI(*MBB, I, DebugLoc(), TII->get(TargetOpcode::KILL)); + Inst = BuildMI(*MBB, Inst, DebugLoc(), TII->get(TargetOpcode::KILL)); } else - --I; + --Inst; } void FPS::setKillFlags(MachineBasicBlock &MBB) const { - const TargetRegisterInfo *TRI = MBB.getParent()->getTarget() - .getRegisterInfo(); + const TargetRegisterInfo *TRI = + MBB.getParent()->getSubtarget().getRegisterInfo(); LivePhysRegs LPR(TRI); LPR.addLiveOuts(&MBB); for (MachineBasicBlock::reverse_iterator I = MBB.rbegin(), E = MBB.rend(); I != E; ++I) { - BitVector Defs(8); + if (I->isDebugValue()) + continue; + + std::bitset<8> Defs; SmallVector Uses; MachineInstr &MI = *I;