X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86.h;h=ba0ee6cedd7142c41e4e39488d0f6bda0f46eb13;hb=12783d1c3a86d1b5287b0703db6893ae1f283877;hp=c6d6a55c06ec30c75b81bd32c3b38843fc62eb5d;hpb=6f0161aac396de29d5a296f8b0ee81827b7e0a9c;p=oota-llvm.git

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index c6d6a55c06e..ba0ee6cedd7 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -1,10 +1,10 @@
 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
 //===----------------------------------------------------------------------===//
 //
 // This file contains the entry points for global functions defined in the x86
@@ -15,41 +15,26 @@
 #ifndef TARGET_X86_H
 #define TARGET_X86_H
 
-#include <iosfwd>
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
 
-class TargetMachine;
 class FunctionPass;
-class IntrinsicLowering;
-
-enum X86VectorEnum {
-  NoSSE, SSE, SSE2, SSE3
-};
-
-extern X86VectorEnum X86Vector;
-
-/// createX86SimpleInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation in a very simple peep-hole fashion.  The
-/// generated code sucks but the implementation is nice and simple.
+class JITCodeEmitter;
+class MCAssembler;
+class MCCodeEmitter;
+class MCContext;
+class MachineCodeEmitter;
+class Target;
+class TargetAsmBackend;
+class X86TargetMachine;
+class formatted_raw_ostream;
+
+/// createX86ISelDag - This pass converts a legalized DAG into a 
+/// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
-
-/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86
-/// specific peephole optimizations.
-///
-FunctionPass *createX86SSAPeepholeOptimizerPass();
-
-/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
-/// optimizations.
-///
-FunctionPass *createX86PeepholeOptimizerPass();
-
-/// createX86FloatingPointKiller - This function returns a pass which
-/// kills every floating point register at the end of each basic block
-/// because our FloatingPointStackifier cannot handle them.
-///
-FunctionPass *createX86FloatingPointKillerPass();
+FunctionPass *createX86ISelDag(X86TargetMachine &TM,
+                               CodeGenOpt::Level OptLevel);
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
@@ -57,12 +42,23 @@ FunctionPass *createX86FloatingPointKillerPass();
 ///
 FunctionPass *createX86FloatingPointStackifierPass();
 
-/// createX86CodePrinterPass - Returns a pass that prints the X86
-/// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.  This should work
-/// regardless of whether the function is in SSA form.
+/// createX87FPRegKillInserterPass - This function returns a pass which
+/// inserts FP_REG_KILL instructions where needed.
 ///
-FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
+FunctionPass *createX87FPRegKillInserterPass();
+
+/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
+/// to the specified MCE object.
+FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
+                                          JITCodeEmitter &JCE);
+
+MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM,
+                                         MCContext &Ctx);
+MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM,
+                                         MCContext &Ctx);
+
+TargetAsmBackend *createX86_32AsmBackend(const Target &, MCAssembler &);
+TargetAsmBackend *createX86_64AsmBackend(const Target &, MCAssembler &);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
@@ -70,11 +66,13 @@ FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
 ///
 FunctionPass *createEmitX86CodeToMemory();
 
+extern Target TheX86_32Target, TheX86_64Target;
+
+} // End llvm namespace
+
 // Defines symbolic names for X86 registers.  This defines a mapping from
 // register name to register number.
 //
-} // End llvm namespace
-
 #include "X86GenRegisterNames.inc"
 
 // Defines symbolic names for the X86 instructions.