X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86.h;h=1d17a05d5b35320c54d74d98a3099025c3a7fe44;hb=00cb3fe786855ce6545234bc3430223eb9272206;hp=81177bad08d866c21c3bdef535fed513e89a7fea;hpb=bfae83139dcb4fffd50b939e1b1224b0126f04d4;p=oota-llvm.git

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 81177bad08d..1d17a05d5b3 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -15,18 +15,23 @@
 #ifndef TARGET_X86_H
 #define TARGET_X86_H
 
-#include <iosfwd>
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
 
 class X86TargetMachine;
 class FunctionPass;
 class MachineCodeEmitter;
+class MCCodeEmitter;
+class JITCodeEmitter;
+class Target;
+class formatted_raw_ostream;
 
 /// createX86ISelDag - This pass converts a legalized DAG into a 
 /// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast);
+FunctionPass *createX86ISelDag(X86TargetMachine &TM,
+                               CodeGenOpt::Level OptLevel);
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
@@ -34,16 +39,19 @@ FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast);
 ///
 FunctionPass *createX86FloatingPointStackifierPass();
 
-/// createX86CodePrinterPass - Returns a pass that prints the X86
-/// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.
+/// createX87FPRegKillInserterPass - This function returns a pass which
+/// inserts FP_REG_KILL instructions where needed.
 ///
-FunctionPass *createX86CodePrinterPass(std::ostream &o, X86TargetMachine &tm);
+FunctionPass *createX87FPRegKillInserterPass();
 
 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
 /// to the specified MCE object.
-FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
-                                       MachineCodeEmitter &MCE);
+FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
+                                          JITCodeEmitter &JCE);
+
+MCCodeEmitter *createHeinousX86MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
@@ -51,6 +59,8 @@ FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
 ///
 FunctionPass *createEmitX86CodeToMemory();
 
+extern Target TheX86_32Target, TheX86_64Target;
+
 } // End llvm namespace
 
 // Defines symbolic names for X86 registers.  This defines a mapping from