X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparcV9%2FRegAlloc%2FPhyRegAlloc.h;h=7ab638f1c679042d569800e3f35c4c7d988a92f5;hb=856ba76200ec2302f2fe500bc507f426c7d566c8;hp=da4d2fd8ecdd859261e5e672630b06889124531e;hpb=c2580ddb0888c0b823dab5e0b9f27bbf4afdd705;p=oota-llvm.git diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h index da4d2fd8ecd..7ab638f1c67 100644 --- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h +++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h @@ -1,45 +1,42 @@ -/* Title: PhyRegAlloc.h -*- C++ -*- - Author: Ruchira Sasanka - Date: Aug 20, 01 - Purpose: This is the main entry point for register allocation. - - Notes: - ===== - - * RegisterClasses: Each RegClass accepts a - MachineRegClass which contains machine specific info about that register - class. The code in the RegClass is machine independent and they use - access functions in the MachineRegClass object passed into it to get - machine specific info. - - * Machine dependent work: All parts of the register coloring algorithm - except coloring of an individual node are machine independent. - - Register allocation must be done as: - - FunctionLiveVarInfo LVI(*FunctionI ); // compute LV info - LVI.analyze(); - - TargetMachine &target = .... - - - PhyRegAlloc PRA(*FunctionI, target, &LVI); // allocate regs - PRA.allocateRegisters(); -*/ - -#ifndef PHY_REG_ALLOC_H -#define PHY_REG_ALLOC_H - -#include "llvm/CodeGen/RegClass.h" -#include "llvm/CodeGen/LiveRangeInfo.h" -#include +//===-- PhyRegAlloc.h - Graph Coloring Register Allocator -------*- c++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This is the main entry point for register allocation. +// +// Notes: +// * RegisterClasses: Each RegClass accepts a +// TargetRegClass which contains machine specific info about that register +// class. The code in the RegClass is machine independent and they use +// access functions in the TargetRegClass object passed into it to get +// machine specific info. +// +// * Machine dependent work: All parts of the register coloring algorithm +// except coloring of an individual node are machine independent. +// +//===----------------------------------------------------------------------===// + +#ifndef PHYREGALLOC_H +#define PHYREGALLOC_H + +#include "LiveRangeInfo.h" +#include "llvm/Pass.h" +#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/Target/TargetRegInfo.h" +#include "llvm/Target/TargetMachine.h" #include -class MachineCodeForMethod; -class MachineRegInfo; +class MachineFunction; class FunctionLiveVarInfo; class MachineInstr; class LoopInfo; +class RegClass; +class Constant; //---------------------------------------------------------------------------- // Class AddedInstrns: @@ -51,113 +48,128 @@ class LoopInfo; //---------------------------------------------------------------------------- struct AddedInstrns { - std::vector InstrnsBefore;// Added insts BEFORE an existing inst - std::vector InstrnsAfter; // Added insts AFTER an existing inst + std::vector InstrnsBefore;//Insts added BEFORE an existing inst + std::vector InstrnsAfter; //Insts added AFTER an existing inst + inline void clear () { InstrnsBefore.clear (); InstrnsAfter.clear (); } }; -typedef std::map AddedInstrMapType; - - - //---------------------------------------------------------------------------- // class PhyRegAlloc: -// Main class the register allocator. Call allocateRegisters() to allocate +// Main class the register allocator. Call runOnFunction() to allocate // registers for a Function. //---------------------------------------------------------------------------- - -class PhyRegAlloc: public NonCopyable { - +class PhyRegAlloc : public FunctionPass { std::vector RegClassList; // vector of register classes const TargetMachine &TM; // target machine - const Function *Meth; // name of the function we work on - MachineCodeForMethod &mcInfo; // descriptor for method's native code - FunctionLiveVarInfo *const LVI; // LV information for this method + const Function *Fn; // name of the function we work on + MachineFunction *MF; // descriptor for method's native code + FunctionLiveVarInfo *LVI; // LV information for this method // (already computed for BBs) - LiveRangeInfo LRI; // LR info (will be computed) - const MachineRegInfo &MRI; // Machine Register information + LiveRangeInfo *LRI; // LR info (will be computed) + const TargetRegInfo &MRI; // Machine Register information const unsigned NumOfRegClasses; // recorded here for efficiency + // Map to indicate whether operands of each MachineInstr have been + // updated according to their assigned colors. This is only used in + // assertion checking (debug builds). + std::map OperandsColoredMap; - AddedInstrMapType AddedInstrMap; // to store instrns added in this phase + // AddedInstrMap - Used to store instrns added in this phase + std::map AddedInstrMap; + + // ScratchRegsUsed - Contains scratch register uses for a particular MI. + typedef std::multimap ScratchRegsUsedTy; + ScratchRegsUsedTy ScratchRegsUsed; + AddedInstrns AddedInstrAtEntry; // to store instrns added at entry - LoopInfo *LoopDepthCalc; // to calculate loop depths - ReservedColorListType ResColList; // A set of reserved regs if desired. - // currently not used + const LoopInfo *LoopDepthCalc; // to calculate loop depths + std::map FnAllocState; + + PhyRegAlloc(const PhyRegAlloc&); // DO NOT IMPLEMENT + void operator=(const PhyRegAlloc&); // DO NOT IMPLEMENT public: - PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi, - LoopInfo *LoopDepthCalc); - ~PhyRegAlloc(); + inline PhyRegAlloc (const TargetMachine &TM_) : + TM (TM_), MRI (TM.getRegInfo ()), + NumOfRegClasses (MRI.getNumOfRegClasses ()) { } + virtual ~PhyRegAlloc() { } - // main method called for allocating registers - // - void allocateRegisters(); + /// runOnFunction - Main method called for allocating registers. + /// + virtual bool runOnFunction (Function &F); + virtual bool doFinalization (Module &M); - // access to register classes by class ID - // - const RegClass* getRegClassByID(unsigned int id) const { - return RegClassList[id]; - } - RegClass* getRegClassByID(unsigned int id) { - return RegClassList[id]; } - - -private: - + virtual void getAnalysisUsage (AnalysisUsage &AU) const; + const char *getPassName () const { + return "Traditional graph-coloring reg. allocator"; + } - //------- ------------------ private methods--------------------------------- + inline const RegClass* getRegClassByID(unsigned id) const { + return RegClassList[id]; + } + inline RegClass *getRegClassByID(unsigned id) { return RegClassList[id]; } +private: void addInterference(const Value *Def, const ValueSet *LVSet, bool isCallInst); + bool markAllocatedRegs(MachineInstr* MInst); void addInterferencesForArgs(); void createIGNodeListsAndIGs(); void buildInterferenceGraphs(); + void saveState(); - void setCallInterferences(const MachineInstr *MInst, - const ValueSet *LVSetAft ); + void setCallInterferences(const MachineInstr *MI, + const ValueSet *LVSetAft); void move2DelayedInstr(const MachineInstr *OrigMI, - const MachineInstr *DelayedMI ); + const MachineInstr *DelayedMI); void markUnusableSugColors(); void allocateStackSpace4SpilledLRs(); - void insertCode4SpilledLR (const LiveRange *LR, - MachineInstr *MInst, - const BasicBlock *BB, - const unsigned OpNum); + void insertCode4SpilledLR(const LiveRange *LR, + MachineBasicBlock::iterator& MII, + MachineBasicBlock &MBB, unsigned OpNum); - inline void constructLiveRanges() { LRI.constructLiveRanges(); } + // Method for inserting caller saving code. The caller must save all the + // volatile registers live across a call. + void insertCallerSavingCode(std::vector& instrnsBefore, + std::vector& instrnsAfter, + MachineInstr *CallMI, + const BasicBlock *BB); void colorIncomingArgs(); void colorCallRetArgs(); void updateMachineCode(); + void updateInstruction(MachineBasicBlock::iterator& MII, + MachineBasicBlock &MBB); - void printLabel(const Value *const Val); - void printMachineCode(); - - friend class UltraSparcRegInfo; - - - int getUsableUniRegAtMI(int RegType, - const ValueSet *LVSetBef, - MachineInstr *MInst, + int getUsableUniRegAtMI(int RegType, const ValueSet *LVSetBef, + MachineInstr *MI, std::vector& MIBef, std::vector& MIAft); - int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst, - const ValueSet *LVSetBef); + // Callback method used to find unused registers. + // LVSetBef is the live variable set to search for an unused register. + // If it is not specified, the LV set before the current MI is used. + // This is sufficient as long as no new copy instructions are generated + // to copy the free register to memory. + // + int getUnusedUniRegAtMI(RegClass *RC, int RegType, + const MachineInstr *MI, + const ValueSet *LVSetBef = 0); + + void setRelRegsUsedByThisInst(RegClass *RC, int RegType, + const MachineInstr *MI); - void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst ); - int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst); + int getUniRegNotUsedByThisInst(RegClass *RC, int RegType, + const MachineInstr *MI); - void addInterf4PseudoInstr(const MachineInstr *MInst); + void addInterf4PseudoInstr(const MachineInstr *MI); }; - #endif -