X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FPPCTargetMachine.cpp;h=f5be148399965bcbe13d6e37e84a4c540bd2d729;hb=061efcfb3e79899493d857f49e50d09f29037e0a;hp=41f4699fc061d4f7cf778107fdec53e8db02a25f;hpb=a7ac47cee1a0b3f4c798ecaa22ecf9d1be9c07e6;p=oota-llvm.git diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 41f4699fc06..f5be1483999 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -12,63 +12,53 @@ //===----------------------------------------------------------------------===// #include "PPC.h" -#include "PPCTargetAsmInfo.h" #include "PPCTargetMachine.h" #include "llvm/PassManager.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetOptions.h" -#include "llvm/Target/TargetRegistry.h" #include "llvm/Support/FormattedStream.h" +#include "llvm/Support/TargetRegistry.h" using namespace llvm; -static const TargetAsmInfo *createTargetAsmInfo(const Target &T, - const StringRef &TT) { - Triple TheTriple(TT); - bool isPPC64 = TheTriple.getArch() == Triple::ppc64; - if (TheTriple.getOS() == Triple::Darwin) - return new PPCDarwinTargetAsmInfo(isPPC64); - return new PPCLinuxTargetAsmInfo(isPPC64); - -} - extern "C" void LLVMInitializePowerPCTarget() { // Register the targets - RegisterTargetMachine A(ThePPC32Target); + RegisterTargetMachine A(ThePPC32Target); RegisterTargetMachine B(ThePPC64Target); - - RegisterAsmInfoFn C(ThePPC32Target, createTargetAsmInfo); - RegisterAsmInfoFn D(ThePPC64Target, createTargetAsmInfo); } - -PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT, - const std::string &FS, bool is64Bit) - : LLVMTargetMachine(T, TT), - Subtarget(TT, FS, is64Bit), +PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL, + bool is64Bit) + : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), + Subtarget(TT, CPU, FS, is64Bit), DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), - FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this), - InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) { - - if (getRelocationModel() == Reloc::Default) { - if (Subtarget.isDarwin()) - setRelocationModel(Reloc::DynamicNoPIC); - else - setRelocationModel(Reloc::Static); - } + FrameLowering(Subtarget), JITInfo(*this, is64Bit), + TLInfo(*this), TSInfo(*this), + InstrItins(Subtarget.getInstrItineraryData()) { } -/// Override this for PowerPC. Tail merging happily breaks up instruction issue -/// groups, which typically degrades performance. -bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; } +void PPC32TargetMachine::anchor() { } -PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT, - const std::string &FS) - : PPCTargetMachine(T, TT, FS, false) { +PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL) + : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { } +void PPC64TargetMachine::anchor() { } -PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT, - const std::string &FS) - : PPCTargetMachine(T, TT, FS, true) { +PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL) + : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { } @@ -76,123 +66,57 @@ PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT, // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, - CodeGenOpt::Level OptLevel) { - // Install an instruction selector. - PM.add(createPPCISelDag(*this)); - return false; +namespace { +/// PPC Code Generator Pass Configuration Options. +class PPCPassConfig : public TargetPassConfig { +public: + PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM) + : TargetPassConfig(TM, PM) {} + + PPCTargetMachine &getPPCTargetMachine() const { + return getTM(); + } + + virtual bool addInstSelector(); + virtual bool getEnableTailMergeDefault() const; + virtual bool addPreEmitPass(); +}; +} // namespace + +TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) { + return new PPCPassConfig(this, PM); } -bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, - CodeGenOpt::Level OptLevel) { - // Must run branch selection immediately preceding the asm printer. - PM.add(createPPCBranchSelectionPass()); +bool PPCPassConfig::addInstSelector() { + // Install an instruction selector. + PM.add(createPPCISelDag(getPPCTargetMachine())); return false; } -bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - MachineCodeEmitter &MCE) { - // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. - // FIXME: This should be moved to TargetJITInfo!! - if (Subtarget.isPPC64()) { - // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many - // instructions to materialize arbitrary global variable + function + - // constant pool addresses. - setRelocationModel(Reloc::PIC_); - // Temporary workaround for the inability of PPC64 JIT to handle jump - // tables. - DisableJumpTables = true; - } else { - setRelocationModel(Reloc::Static); - } - - // Inform the subtarget that we are in JIT mode. FIXME: does this break macho - // writing? - Subtarget.SetJITMode(); - - // Machine code emitter pass for PowerPC. - PM.add(createPPCCodeEmitterPass(*this, MCE)); +/// Override this for PowerPC. Tail merging happily breaks up instruction issue +/// groups, which typically degrades performance. +bool PPCPassConfig::getEnableTailMergeDefault() const { return false; } +bool PPCPassConfig::addPreEmitPass() { + // Must run branch selection immediately preceding the asm printer. + PM.add(createPPCBranchSelectionPass()); return false; } bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, JITCodeEmitter &JCE) { - // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. // FIXME: This should be moved to TargetJITInfo!! - if (Subtarget.isPPC64()) { - // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many - // instructions to materialize arbitrary global variable + function + - // constant pool addresses. - setRelocationModel(Reloc::PIC_); + if (Subtarget.isPPC64()) // Temporary workaround for the inability of PPC64 JIT to handle jump // tables. - DisableJumpTables = true; - } else { - setRelocationModel(Reloc::Static); - } - - // Inform the subtarget that we are in JIT mode. FIXME: does this break macho - // writing? - Subtarget.SetJITMode(); - - // Machine code emitter pass for PowerPC. - PM.add(createPPCJITCodeEmitterPass(*this, JCE)); - - return false; -} + Options.DisableJumpTables = true; -bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - ObjectCodeEmitter &OCE) { - // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. - // FIXME: This should be moved to TargetJITInfo!! - if (Subtarget.isPPC64()) { - // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many - // instructions to materialize arbitrary global variable + function + - // constant pool addresses. - setRelocationModel(Reloc::PIC_); - // Temporary workaround for the inability of PPC64 JIT to handle jump - // tables. - DisableJumpTables = true; - } else { - setRelocationModel(Reloc::Static); - } - // Inform the subtarget that we are in JIT mode. FIXME: does this break macho // writing? Subtarget.SetJITMode(); - - // Machine code emitter pass for PowerPC. - PM.add(createPPCObjectCodeEmitterPass(*this, OCE)); - - return false; -} -bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - MachineCodeEmitter &MCE) { - // Machine code emitter pass for PowerPC. - PM.add(createPPCCodeEmitterPass(*this, MCE)); - return false; -} - -bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - JITCodeEmitter &JCE) { // Machine code emitter pass for PowerPC. PM.add(createPPCJITCodeEmitterPass(*this, JCE)); - return false; -} -bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - ObjectCodeEmitter &OCE) { - // Machine code emitter pass for PowerPC. - PM.add(createPPCObjectCodeEmitterPass(*this, OCE)); return false; } - -