X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FPPCBranchSelector.cpp;h=6f7b597da3a7b8699c5c7c547a0709bd9b4bbe9f;hb=551ccae044b0ff658fe629dd67edd5ffe75d10e8;hp=dbc4b7de489949fd8cbb3e5b4fd36cb164c3101b;hpb=999d9cfde515a6735b376071090b89efb25cf8e6;p=oota-llvm.git

diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index dbc4b7de489..6f7b597da3a 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -19,9 +19,10 @@
 #include "PowerPC.h"
 #include "PowerPCInstrBuilder.h"
 #include "PowerPCInstrInfo.h"
+#include "PPC32InstrInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineFunction.h"
-#include "Support/Debug.h"
+#include "llvm/Support/Debug.h"
 #include <map>
 using namespace llvm;
 
@@ -35,17 +36,17 @@ namespace {
     ///
     static unsigned bytesForOpcode(unsigned opcode) {
       switch (opcode) {
-      case PPC32::COND_BRANCH:
+      case PPC::COND_BRANCH:
         // while this will be 4 most of the time, if we emit 12 it is just a
         // minor pessimization that saves us from having to worry about 
         // keeping the offsets up to date later when we emit long branch glue.
         return 12;
-      case PPC32::MovePCtoLR:
+      case PPC::MovePCtoLR:
         // MovePCtoLR is actually a combination of a branch-and-link (bl)
         // followed by a move from link register to dest reg (mflr)
         return 8;
         break;
-      case PPC32::IMPLICIT_DEF: // no asm emitted
+      case PPC::IMPLICIT_DEF: // no asm emitted
         return 0;
         break;
       default: 
@@ -91,7 +92,7 @@ namespace {
         
         for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
              MBBI != EE; ++MBBI) {
-          if (MBBI->getOpcode() == PPC32::COND_BRANCH) {
+          if (MBBI->getOpcode() == PPC::COND_BRANCH) {
             // condbranch operands:
             // 0. CR0 register
             // 1. bc opcode
@@ -104,19 +105,15 @@ namespace {
             
             int Displacement = OffsetMap[trueMBB] - ByteCount;
             unsigned Opcode = MBBI->getOperand(1).getImmedValue();
-            unsigned Inverted = PowerPCInstrInfo::invertPPCBranchOpcode(Opcode);
+            unsigned Inverted = PPC32InstrInfo::invertPPCBranchOpcode(Opcode);
 
             MachineInstr *MI = MBBI;
             if (Displacement >= -32768 && Displacement <= 32767) {
-              BuildMI(*MBB, MBBI, Opcode, 2).addReg(PPC32::CR0).addMBB(trueMBB);
+              BuildMI(*MBB, MBBI, Opcode, 2).addReg(PPC::CR0).addMBB(trueMBB);
             } else {
-              BuildMI(*MBB, MBBI, Inverted, 2).addReg(PPC32::CR0).addSImm(8);
-              BuildMI(*MBB, MBBI, PPC32::B, 1).addMBB(trueMBB);
-              BuildMI(*MBB, MBBI, PPC32::B, 1).addMBB(falseMBB);
-
-              // Let the byte tracker know that we just added 8 bytes worth of
-              // branches in addition to the original branch instruction.
-              ByteCount += 8;
+              BuildMI(*MBB, MBBI, Inverted, 2).addReg(PPC::CR0).addSImm(8);
+              BuildMI(*MBB, MBBI, PPC::B, 1).addMBB(trueMBB);
+              BuildMI(*MBB, MBBI, PPC::B, 1).addMBB(falseMBB);
             }
             MBB->erase(MI);
           }