X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FMakefile;h=1617b26ca4a5f740d4f747d60b888e29cdf88922;hb=722c9a7925d1a66569513a1894fdd230962fa3f9;hp=1aa9b8e733087a250df9a40389b2948e237c9027;hpb=76e2df264560b6c5aae1b820a6ccfdf0615bb935;p=oota-llvm.git diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile index 1aa9b8e7330..1617b26ca4a 100644 --- a/lib/Target/PowerPC/Makefile +++ b/lib/Target/PowerPC/Makefile @@ -1,56 +1,23 @@ ##===- lib/Target/PowerPC/Makefile -------------------------*- Makefile -*-===## -# +# # The LLVM Compiler Infrastructure # -# This file was developed by the LLVM research group and is distributed under -# the University of Illinois Open Source License. See LICENSE.TXT for details. -# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# ##===----------------------------------------------------------------------===## + LEVEL = ../../.. -LIBRARYNAME = powerpc2 -SHARED_LIBRARY=1 -include $(LEVEL)/Makefile.common +LIBRARYNAME = LLVMPowerPCCodeGen +TARGET = PPC # Make sure that tblgen is run, first thing. -$(SourceDepend): PowerPCGenRegisterInfo.h.inc PowerPCGenRegisterNames.inc \ - PowerPCGenRegisterInfo.inc PowerPCGenInstrNames.inc \ - PowerPCGenInstrInfo.inc PowerPCGenInstrSelector.inc - -PowerPCGenRegisterNames.inc:: $(SourceDir)/PowerPC.td \ - $(SourceDir)/PowerPCReg.td \ - $(SourceDir)/../Target.td $(TBLGEN) - @echo "Building PowerPC.td register names with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@ +BUILT_SOURCES = PPCGenRegisterInfo.inc \ + PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \ + PPCGenInstrInfo.inc PPCGenDAGISel.inc \ + PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \ + PPCGenMCCodeEmitter.inc -PowerPCGenRegisterInfo.h.inc:: $(SourceDir)/PowerPC.td \ - $(SourceDir)/PowerPCReg.td \ - $(SourceDir)/../Target.td $(TBLGEN) - @echo "Building PowerPC.td register information header with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@ +DIRS = InstPrinter TargetInfo MCTargetDesc -PowerPCGenRegisterInfo.inc:: $(SourceDir)/PowerPC.td \ - $(SourceDir)/PowerPCReg.td \ - $(SourceDir)/../Target.td $(TBLGEN) - @echo "Building PowerPC.td register information implementation with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@ - -PowerPCGenInstrNames.inc:: $(SourceDir)/PowerPC.td \ - $(SourceDir)/PowerPCInstrs.td \ - $(SourceDir)/../Target.td $(TBLGEN) - @echo "Building PowerPC.td instruction names with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@ - -PowerPCGenInstrInfo.inc:: $(SourceDir)/PowerPC.td \ - $(SourceDir)/PowerPCInstrs.td \ - $(SourceDir)/../Target.td $(TBLGEN) - @echo "Building PowerPC.td instruction information with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@ - -PowerPCGenInstrSelector.inc:: $(SourceDir)/PowerPC.td \ - $(SourceDir)/PowerPCInstrs.td \ - $(SourceDir)/../Target.td $(TBLGEN) - @echo "Building PowerPC.td instruction selector with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@ - -clean:: - $(VERB) rm -f *.inc +include $(LEVEL)/Makefile.common