X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMips%2FMips16InstrInfo.td;h=10fff03b7240f118685569ad7f6dedb429408321;hb=872808e946f3f8be1b30a6672697c2ba8e12f9e1;hp=11166c45a880eb4b9031916722b4e866a2ecf070;hpb=5e95e642e9d072beddb6c75724b7064ba4d45f85;p=oota-llvm.git diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td index 11166c45a88..10fff03b724 100644 --- a/lib/Target/Mips/Mips16InstrInfo.td +++ b/lib/Target/Mips/Mips16InstrInfo.td @@ -502,7 +502,7 @@ class ArithLogic16Defs { bits<5> shamt = 0; bit isCommutable = isCom; bit isReMaterializable = 1; - bit neverHasSideEffects = 1; + bit hasSideEffects = 0; } class branch16 { @@ -879,7 +879,7 @@ def MoveR3216: FI8_MOVR3216_ins<"move", IIAlu>; // def Mfhi16: FRR16_M_ins<0b10000, "mfhi", IIAlu> { let Uses = [HI0]; - let neverHasSideEffects = 1; + let hasSideEffects = 0; } // @@ -889,7 +889,7 @@ def Mfhi16: FRR16_M_ins<0b10000, "mfhi", IIAlu> { // def Mflo16: FRR16_M_ins<0b10010, "mflo", IIAlu> { let Uses = [LO0]; - let neverHasSideEffects = 1; + let hasSideEffects = 0; } // @@ -897,13 +897,13 @@ def Mflo16: FRR16_M_ins<0b10010, "mflo", IIAlu> { // def MultRxRy16: FMULT16_ins<"mult", IIAlu> { let isCommutable = 1; - let neverHasSideEffects = 1; + let hasSideEffects = 0; let Defs = [HI0, LO0]; } def MultuRxRy16: FMULT16_ins<"multu", IIAlu> { let isCommutable = 1; - let neverHasSideEffects = 1; + let hasSideEffects = 0; let Defs = [HI0, LO0]; } @@ -914,7 +914,7 @@ def MultuRxRy16: FMULT16_ins<"multu", IIAlu> { // def MultRxRyRz16: FMULT16_LO_ins<"mult", IIAlu> { let isCommutable = 1; - let neverHasSideEffects = 1; + let hasSideEffects = 0; let Defs = [HI0, LO0]; } @@ -925,7 +925,7 @@ def MultRxRyRz16: FMULT16_LO_ins<"mult", IIAlu> { // def MultuRxRyRz16: FMULT16_LO_ins<"multu", IIAlu> { let isCommutable = 1; - let neverHasSideEffects = 1; + let hasSideEffects = 0; let Defs = [HI0, LO0]; } @@ -1370,9 +1370,11 @@ def : Mips16Pat<(MipsJmpLink (i32 texternalsym:$dst)), (Jal16 texternalsym:$dst)>; // Indirect branch -def: Mips16Pat< - (brind CPU16Regs:$rs), - (JrcRx16 CPU16Regs:$rs)>; +def: Mips16Pat<(brind CPU16Regs:$rs), (JrcRx16 CPU16Regs:$rs)> { + // Ensure that the addition of MIPS32r6/MIPS64r6 support does not change + // MIPS16's behaviour. + let AddedComplexity = 1; +} // Jump and Link (Call) let isCall=1, hasDelaySlot=0 in @@ -1769,9 +1771,9 @@ def: Mips16Pat // // For constants, llvm transforms this to: -// x > (k -1) and then reverses the operands to use setlt. So this pattern +// x > (k - 1) and then reverses the operands to use setlt. So this pattern // is not used now by the compiler. (Presumably checking that k-1 does not -// overflow). The compiler never uses this at a the current time, due to +// overflow). The compiler never uses this at the current time, due to // other optimizations. // //def: Mips16Pat @@ -1908,7 +1910,7 @@ def cpinst_operand : Operand { // is the index into the MachineConstantPool that this is, the third is the // size in bytes of this constant pool entry. // -let neverHasSideEffects = 1, isNotDuplicable = 1 in +let hasSideEffects = 0, isNotDuplicable = 1 in def CONSTPOOL_ENTRY : MipsPseudo16<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx, i32imm:$size), "foo", []>;