X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMips%2FMips16ISelLowering.cpp;h=68259f0a4ee30d360034d7714e4148d7f37c4abb;hb=200f3764bf8abd4a4e8e3bb3b5d205c9838e5bfa;hp=f0faca6d63cdfd09de6968331a0748dd5b781c70;hpb=b359bda93d410623bbbc96dc9968d94447169a79;p=oota-llvm.git diff --git a/lib/Target/Mips/Mips16ISelLowering.cpp b/lib/Target/Mips/Mips16ISelLowering.cpp index f0faca6d63c..68259f0a4ee 100644 --- a/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/lib/Target/Mips/Mips16ISelLowering.cpp @@ -10,21 +10,26 @@ // Subclass of MipsTargetLowering specialized for mips16. // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "mips-lower" #include "Mips16ISelLowering.h" +#include "MCTargetDesc/MipsBaseInfo.h" +#include "Mips16HardFloatInfo.h" +#include "MipsMachineFunction.h" #include "MipsRegisterInfo.h" #include "MipsTargetMachine.h" -#include "MCTargetDesc/MipsBaseInfo.h" +#include "llvm/ADT/StringRef.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/CommandLine.h" #include "llvm/Target/TargetInstrInfo.h" +#include using namespace llvm; +#define DEBUG_TYPE "mips-lower" + static cl::opt DontExpandCondPseudos16( "mips16-dont-expand-cond-pseudo", cl::init(false), - cl::desc("Dont expand conditional move related " + cl::desc("Don't expand conditional move related " "pseudos for Mips 16"), cl::Hidden); @@ -115,20 +120,14 @@ static const Mips16IntrinsicHelperType Mips16IntrinsicHelper[] = { {"truncf", "__mips16_call_stub_sf_1"}, }; -Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM) - : MipsTargetLowering(TM) { - // - // set up as if mips32 and then revert so we can test the mechanism - // for switching - addRegisterClass(MVT::i32, &Mips::GPR32RegClass); - addRegisterClass(MVT::f32, &Mips::FGR32RegClass); - computeRegisterProperties(); - clearRegisterClasses(); +Mips16TargetLowering::Mips16TargetLowering(const MipsTargetMachine &TM, + const MipsSubtarget &STI) + : MipsTargetLowering(TM, STI) { // Set up the register classes addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass); - if (Subtarget->inMips16HardFloat()) + if (!TM.Options.UseSoftFloat) setMips16HardFloatLibCalls(); setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); @@ -154,12 +153,16 @@ Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM) } const MipsTargetLowering * -llvm::createMips16TargetLowering(MipsTargetMachine &TM) { - return new Mips16TargetLowering(TM); +llvm::createMips16TargetLowering(const MipsTargetMachine &TM, + const MipsSubtarget &STI) { + return new Mips16TargetLowering(TM, STI); } bool -Mips16TargetLowering::allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const { +Mips16TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, + unsigned, + unsigned, + bool *Fast) const { return false; } @@ -174,57 +177,57 @@ Mips16TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, case Mips::SelBneZ: return emitSel16(Mips::BnezRxImm16, MI, BB); case Mips::SelTBteqZCmpi: - return emitSeliT16(Mips::BteqzX16, Mips::CmpiRxImmX16, MI, BB); + return emitSeliT16(Mips::Bteqz16, Mips::CmpiRxImmX16, MI, BB); case Mips::SelTBteqZSlti: - return emitSeliT16(Mips::BteqzX16, Mips::SltiRxImmX16, MI, BB); + return emitSeliT16(Mips::Bteqz16, Mips::SltiRxImmX16, MI, BB); case Mips::SelTBteqZSltiu: - return emitSeliT16(Mips::BteqzX16, Mips::SltiuRxImmX16, MI, BB); + return emitSeliT16(Mips::Bteqz16, Mips::SltiuRxImmX16, MI, BB); case Mips::SelTBtneZCmpi: - return emitSeliT16(Mips::BtnezX16, Mips::CmpiRxImmX16, MI, BB); + return emitSeliT16(Mips::Btnez16, Mips::CmpiRxImmX16, MI, BB); case Mips::SelTBtneZSlti: - return emitSeliT16(Mips::BtnezX16, Mips::SltiRxImmX16, MI, BB); + return emitSeliT16(Mips::Btnez16, Mips::SltiRxImmX16, MI, BB); case Mips::SelTBtneZSltiu: - return emitSeliT16(Mips::BtnezX16, Mips::SltiuRxImmX16, MI, BB); + return emitSeliT16(Mips::Btnez16, Mips::SltiuRxImmX16, MI, BB); case Mips::SelTBteqZCmp: - return emitSelT16(Mips::BteqzX16, Mips::CmpRxRy16, MI, BB); + return emitSelT16(Mips::Bteqz16, Mips::CmpRxRy16, MI, BB); case Mips::SelTBteqZSlt: - return emitSelT16(Mips::BteqzX16, Mips::SltRxRy16, MI, BB); + return emitSelT16(Mips::Bteqz16, Mips::SltRxRy16, MI, BB); case Mips::SelTBteqZSltu: - return emitSelT16(Mips::BteqzX16, Mips::SltuRxRy16, MI, BB); + return emitSelT16(Mips::Bteqz16, Mips::SltuRxRy16, MI, BB); case Mips::SelTBtneZCmp: - return emitSelT16(Mips::BtnezX16, Mips::CmpRxRy16, MI, BB); + return emitSelT16(Mips::Btnez16, Mips::CmpRxRy16, MI, BB); case Mips::SelTBtneZSlt: - return emitSelT16(Mips::BtnezX16, Mips::SltRxRy16, MI, BB); + return emitSelT16(Mips::Btnez16, Mips::SltRxRy16, MI, BB); case Mips::SelTBtneZSltu: - return emitSelT16(Mips::BtnezX16, Mips::SltuRxRy16, MI, BB); + return emitSelT16(Mips::Btnez16, Mips::SltuRxRy16, MI, BB); case Mips::BteqzT8CmpX16: - return emitFEXT_T8I816_ins(Mips::BteqzX16, Mips::CmpRxRy16, MI, BB); + return emitFEXT_T8I816_ins(Mips::Bteqz16, Mips::CmpRxRy16, MI, BB); case Mips::BteqzT8SltX16: - return emitFEXT_T8I816_ins(Mips::BteqzX16, Mips::SltRxRy16, MI, BB); + return emitFEXT_T8I816_ins(Mips::Bteqz16, Mips::SltRxRy16, MI, BB); case Mips::BteqzT8SltuX16: // TBD: figure out a way to get this or remove the instruction // altogether. - return emitFEXT_T8I816_ins(Mips::BteqzX16, Mips::SltuRxRy16, MI, BB); + return emitFEXT_T8I816_ins(Mips::Bteqz16, Mips::SltuRxRy16, MI, BB); case Mips::BtnezT8CmpX16: - return emitFEXT_T8I816_ins(Mips::BtnezX16, Mips::CmpRxRy16, MI, BB); + return emitFEXT_T8I816_ins(Mips::Btnez16, Mips::CmpRxRy16, MI, BB); case Mips::BtnezT8SltX16: - return emitFEXT_T8I816_ins(Mips::BtnezX16, Mips::SltRxRy16, MI, BB); + return emitFEXT_T8I816_ins(Mips::Btnez16, Mips::SltRxRy16, MI, BB); case Mips::BtnezT8SltuX16: // TBD: figure out a way to get this or remove the instruction // altogether. - return emitFEXT_T8I816_ins(Mips::BtnezX16, Mips::SltuRxRy16, MI, BB); + return emitFEXT_T8I816_ins(Mips::Btnez16, Mips::SltuRxRy16, MI, BB); case Mips::BteqzT8CmpiX16: return emitFEXT_T8I8I16_ins( - Mips::BteqzX16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, false, MI, BB); + Mips::Bteqz16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, false, MI, BB); case Mips::BteqzT8SltiX16: return emitFEXT_T8I8I16_ins( - Mips::BteqzX16, Mips::SltiRxImm16, Mips::SltiRxImmX16, true, MI, BB); + Mips::Bteqz16, Mips::SltiRxImm16, Mips::SltiRxImmX16, true, MI, BB); case Mips::BteqzT8SltiuX16: return emitFEXT_T8I8I16_ins( - Mips::BteqzX16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, false, MI, BB); + Mips::Bteqz16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, false, MI, BB); case Mips::BtnezT8CmpiX16: return emitFEXT_T8I8I16_ins( - Mips::BtnezX16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, false, MI, BB); + Mips::Btnez16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, false, MI, BB); case Mips::BtnezT8SltiX16: return emitFEXT_T8I8I16_ins( - Mips::BtnezX16, Mips::SltiRxImm16, Mips::SltiRxImmX16, true, MI, BB); + Mips::Btnez16, Mips::SltiRxImm16, Mips::SltiRxImmX16, true, MI, BB); case Mips::BtnezT8SltiuX16: return emitFEXT_T8I8I16_ins( - Mips::BtnezX16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, false, MI, BB); + Mips::Btnez16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, false, MI, BB); break; case Mips::SltCCRxRy16: return emitFEXT_CCRX16_ins(Mips::SltRxRy16, MI, BB); @@ -319,7 +322,7 @@ unsigned int Mips16TargetLowering::getMips16HelperFunctionStubNumber } // -// prefixs are attached to stub numbers depending on the return type . +// Prefixes are attached to stub numbers depending on the return type. // return type: float sf_ // double df_ // single complex sc_ @@ -330,17 +333,16 @@ unsigned int Mips16TargetLowering::getMips16HelperFunctionStubNumber // The full name of a helper function is__mips16_call_stub + // return type dependent prefix + stub number // -// -// This is something that probably should be in a different source file and -// perhaps done differently but my main purpose is to not waste runtime +// FIXME: This is something that probably should be in a different source file +// and perhaps done differently but my main purpose is to not waste runtime // on something that we can enumerate in the source. Another possibility is // to have a python script to generate these mapping tables. This will do // for now. There are a whole series of helper function mapping arrays, one // for each return type class as outlined above. There there are 11 possible -// entries. Ones with 0 are ones which should never be selected +// entries. Ones with 0 are ones which should never be selected. // // All the arrays are similar except for ones which return neither -// sf, df, sc, dc, in which only care about ones which have sf or df as a +// sf, df, sc, dc, in which we only care about ones which have sf or df as a // first parameter. // #define P_ "__mips16_call_stub_" @@ -349,7 +351,7 @@ unsigned int Mips16TargetLowering::getMips16HelperFunctionStubNumber #define T P "0" , T1 #define P P_ static char const * vMips16Helper[MAX_STUB_NUMBER+1] = - {0, T1 }; + {nullptr, T1 }; #undef P #define P P_ "sf_" static char const * sfMips16Helper[MAX_STUB_NUMBER+1] = @@ -426,11 +428,10 @@ getOpndList(SmallVectorImpl &Ops, SelectionDAG &DAG = CLI.DAG; MachineFunction &MF = DAG.getMachineFunction(); MipsFunctionInfo *FuncInfo = MF.getInfo(); - const char* Mips16HelperFunction = 0; + const char* Mips16HelperFunction = nullptr; bool NeedMips16Helper = false; - if (getTargetMachine().Options.UseSoftFloat && - Subtarget->inMips16HardFloat()) { + if (Subtarget.inMips16HardFloat()) { // // currently we don't have symbols tagged with the mips16 or mips32 // qualifier so we will assume that we don't know what kind it is. @@ -440,19 +441,40 @@ getOpndList(SmallVectorImpl &Ops, if (ExternalSymbolSDNode *S = dyn_cast(CLI.Callee)) { Mips16Libcall Find = { RTLIB::UNKNOWN_LIBCALL, S->getSymbol() }; - if (std::binary_search(HardFloatLibCalls, array_endof(HardFloatLibCalls), - Find)) + if (std::binary_search(std::begin(HardFloatLibCalls), + std::end(HardFloatLibCalls), Find)) LookupHelper = false; else { - Mips16IntrinsicHelperType IntrinsicFind = {S->getSymbol(), ""}; + const char *Symbol = S->getSymbol(); + Mips16IntrinsicHelperType IntrinsicFind = { Symbol, "" }; + const Mips16HardFloatInfo::FuncSignature *Signature = + Mips16HardFloatInfo::findFuncSignature(Symbol); + if (!IsPICCall && (Signature && (FuncInfo->StubsNeeded.find(Symbol) == + FuncInfo->StubsNeeded.end()))) { + FuncInfo->StubsNeeded[Symbol] = Signature; + // + // S2 is normally saved if the stub is for a function which + // returns a float or double value and is not otherwise. This is + // because more work is required after the function the stub + // is calling completes, and so the stub cannot directly return + // and the stub has no stack space to store the return address so + // S2 is used for that purpose. + // In order to take advantage of not saving S2, we need to also + // optimize the call in the stub and this requires some further + // functionality in MipsAsmPrinter which we don't have yet. + // So for now we always save S2. The optimization will be done + // in a follow-on patch. + // + if (1 || (Signature->RetSig != Mips16HardFloatInfo::NoFPRet)) + FuncInfo->setSaveS2(); + } // one more look at list of intrinsics - if (std::binary_search(Mips16IntrinsicHelper, - array_endof(Mips16IntrinsicHelper), - IntrinsicFind)) { - const Mips16IntrinsicHelperType *h =(std::find(Mips16IntrinsicHelper, - array_endof(Mips16IntrinsicHelper), - IntrinsicFind)); - Mips16HelperFunction = h->Helper; + const Mips16IntrinsicHelperType *Helper = + std::lower_bound(std::begin(Mips16IntrinsicHelper), + std::end(Mips16IntrinsicHelper), IntrinsicFind); + if (Helper != std::end(Mips16IntrinsicHelper) && + *Helper == IntrinsicFind) { + Mips16HelperFunction = Helper->Helper; NeedMips16Helper = true; LookupHelper = false; } @@ -463,13 +485,13 @@ getOpndList(SmallVectorImpl &Ops, Mips16Libcall Find = { RTLIB::UNKNOWN_LIBCALL, G->getGlobal()->getName().data() }; - if (std::binary_search(HardFloatLibCalls, array_endof(HardFloatLibCalls), - Find)) + if (std::binary_search(std::begin(HardFloatLibCalls), + std::end(HardFloatLibCalls), Find)) LookupHelper = false; } - if (LookupHelper) Mips16HelperFunction = - getMips16HelperFunction(CLI.RetTy, CLI.Args, NeedMips16Helper); - + if (LookupHelper) + Mips16HelperFunction = + getMips16HelperFunction(CLI.RetTy, CLI.getArgs(), NeedMips16Helper); } SDValue JumpTarget = Callee; @@ -499,7 +521,8 @@ MachineBasicBlock *Mips16TargetLowering:: emitSel16(unsigned Opc, MachineInstr *MI, MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); DebugLoc DL = MI->getDebugLoc(); // To "insert" a SELECT_CC instruction, we actually have to insert the // diamond control-flow pattern. The incoming instruction knows the @@ -524,8 +547,7 @@ emitSel16(unsigned Opc, MachineInstr *MI, MachineBasicBlock *BB) const { // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, - llvm::next(MachineBasicBlock::iterator(MI)), - BB->end()); + std::next(MachineBasicBlock::iterator(MI)), BB->end()); sinkMBB->transferSuccessorsAndUpdatePHIs(BB); // Next, add the true and fallthrough blocks as its successors. @@ -562,7 +584,8 @@ MachineBasicBlock *Mips16TargetLowering::emitSelT16 MachineInstr *MI, MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); DebugLoc DL = MI->getDebugLoc(); // To "insert" a SELECT_CC instruction, we actually have to insert the // diamond control-flow pattern. The incoming instruction knows the @@ -587,8 +610,7 @@ MachineBasicBlock *Mips16TargetLowering::emitSelT16 // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, - llvm::next(MachineBasicBlock::iterator(MI)), - BB->end()); + std::next(MachineBasicBlock::iterator(MI)), BB->end()); sinkMBB->transferSuccessorsAndUpdatePHIs(BB); // Next, add the true and fallthrough blocks as its successors. @@ -627,7 +649,8 @@ MachineBasicBlock *Mips16TargetLowering::emitSeliT16 MachineInstr *MI, MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); DebugLoc DL = MI->getDebugLoc(); // To "insert" a SELECT_CC instruction, we actually have to insert the // diamond control-flow pattern. The incoming instruction knows the @@ -652,8 +675,7 @@ MachineBasicBlock *Mips16TargetLowering::emitSeliT16 // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, - llvm::next(MachineBasicBlock::iterator(MI)), - BB->end()); + std::next(MachineBasicBlock::iterator(MI)), BB->end()); sinkMBB->transferSuccessorsAndUpdatePHIs(BB); // Next, add the true and fallthrough blocks as its successors. @@ -693,7 +715,8 @@ MachineBasicBlock MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); unsigned regX = MI->getOperand(0).getReg(); unsigned regY = MI->getOperand(1).getReg(); MachineBasicBlock *target = MI->getOperand(2).getMBB(); @@ -709,7 +732,8 @@ MachineBasicBlock *Mips16TargetLowering::emitFEXT_T8I8I16_ins( MachineInstr *MI, MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); unsigned regX = MI->getOperand(0).getReg(); int64_t imm = MI->getOperand(1).getImm(); MachineBasicBlock *target = MI->getOperand(2).getMBB(); @@ -743,12 +767,13 @@ MachineBasicBlock *Mips16TargetLowering::emitFEXT_CCRX16_ins( MachineInstr *MI, MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); unsigned CC = MI->getOperand(0).getReg(); unsigned regX = MI->getOperand(1).getReg(); unsigned regY = MI->getOperand(2).getReg(); - BuildMI(*BB, MI, MI->getDebugLoc(), - TII->get(SltOpc)).addReg(regX).addReg(regY); + BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(SltOpc)).addReg(regX).addReg( + regY); BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(Mips::MoveR3216), CC).addReg(Mips::T8); MI->eraseFromParent(); // The pseudo instruction is gone now. @@ -760,7 +785,8 @@ MachineBasicBlock *Mips16TargetLowering::emitFEXT_CCRXI16_ins( MachineInstr *MI, MachineBasicBlock *BB )const { if (DontExpandCondPseudos16) return BB; - const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); + const TargetInstrInfo *TII = + getTargetMachine().getSubtargetImpl()->getInstrInfo(); unsigned CC = MI->getOperand(0).getReg(); unsigned regX = MI->getOperand(1).getReg(); int64_t Imm = MI->getOperand(2).getImm();