X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMips%2FMCTargetDesc%2FMipsTargetStreamer.cpp;h=e5fa7556053f96944c8e4eb5a55eac925feac477;hb=8452e84d36329276ab755269896bd61bb994461e;hp=ce30b9b59f035b14ed5f3eaaa87a8e726492ad94;hpb=48017d1bcd33a9bd3d0ff53574c31f0798e9bf66;p=oota-llvm.git diff --git a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp index ce30b9b59f0..e5fa7556053 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp @@ -17,10 +17,9 @@ #include "MipsTargetObjectFile.h" #include "MipsTargetStreamer.h" #include "llvm/MC/MCContext.h" -#include "llvm/MC/MCELF.h" #include "llvm/MC/MCSectionELF.h" #include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCSymbolELF.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ELF.h" #include "llvm/Support/ErrorHandling.h" @@ -29,27 +28,24 @@ using namespace llvm; MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S) - : MCTargetStreamer(S), canHaveModuleDirective(true) { + : MCTargetStreamer(S), ModuleDirectiveAllowed(true) { GPRInfoSet = FPRInfoSet = FrameInfoSet = false; } void MipsTargetStreamer::emitDirectiveSetMicroMips() {} void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {} void MipsTargetStreamer::emitDirectiveSetMips16() {} -void MipsTargetStreamer::emitDirectiveSetNoMips16() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetReorder() { - setCanHaveModuleDir(false); -} +void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); } void MipsTargetStreamer::emitDirectiveSetNoReorder() {} -void MipsTargetStreamer::emitDirectiveSetMacro() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetNoMacro() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetAt() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetNoAt() { setCanHaveModuleDir(false); } +void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { + forbidModuleDirective(); +} +void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); } void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {} void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {} void MipsTargetStreamer::emitDirectiveAbiCalls() {} @@ -57,44 +53,68 @@ void MipsTargetStreamer::emitDirectiveNaN2008() {} void MipsTargetStreamer::emitDirectiveNaNLegacy() {} void MipsTargetStreamer::emitDirectiveOptionPic0() {} void MipsTargetStreamer::emitDirectiveOptionPic2() {} +void MipsTargetStreamer::emitDirectiveInsn() { forbidModuleDirective(); } void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) {} void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {} void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) { } -void MipsTargetStreamer::emitDirectiveSetMips1() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetMips2() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetMips3() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetMips4() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetMips5() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveSetMips32() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetMips32R2() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetMips32R6() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetMips64() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetMips64R2() { - setCanHaveModuleDir(false); -} -void MipsTargetStreamer::emitDirectiveSetMips64R6() { - setCanHaveModuleDir(false); +void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) { + forbidModuleDirective(); +} +void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetSoftFloat() { + forbidModuleDirective(); +} +void MipsTargetStreamer::emitDirectiveSetHardFloat() { + forbidModuleDirective(); +} +void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {} +void MipsTargetStreamer::emitDirectiveCpRestore( + SmallVector &StoreInsts, int Offset) { + forbidModuleDirective(); } -void MipsTargetStreamer::emitDirectiveSetDsp() { setCanHaveModuleDir(false); } -void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {} void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) { } -void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled, - bool IsO32ABI) { - if (!Enabled && !IsO32ABI) +void MipsTargetStreamer::emitDirectiveCpreturn(unsigned SaveLocation, + bool SaveLocationIsRegister) {} + +void MipsTargetStreamer::emitDirectiveModuleFP() {} + +void MipsTargetStreamer::emitDirectiveModuleOddSPReg() { + if (!ABIFlagsSection.OddSPReg && !ABIFlagsSection.Is32BitABI) report_fatal_error("+nooddspreg is only valid for O32"); } +void MipsTargetStreamer::emitDirectiveModuleSoftFloat() {} +void MipsTargetStreamer::emitDirectiveModuleHardFloat() {} +void MipsTargetStreamer::emitDirectiveSetFp( + MipsABIFlagsSection::FpABIKind Value) { + forbidModuleDirective(); +} +void MipsTargetStreamer::emitDirectiveSetOddSPReg() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetNoOddSPReg() { + forbidModuleDirective(); +} MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS) @@ -102,17 +122,17 @@ MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S, void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() { OS << "\t.set\tmicromips\n"; - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() { OS << "\t.set\tnomicromips\n"; - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetAsmStreamer::emitDirectiveSetMips16() { OS << "\t.set\tmips16\n"; - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() { @@ -127,7 +147,7 @@ void MipsTargetAsmStreamer::emitDirectiveSetReorder() { void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() { OS << "\t.set\tnoreorder\n"; - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetAsmStreamer::emitDirectiveSetMacro() { @@ -155,6 +175,11 @@ void MipsTargetAsmStreamer::emitDirectiveSetAt() { MipsTargetStreamer::emitDirectiveSetAt(); } +void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { + OS << "\t.set\tat=$" << Twine(RegNo) << "\n"; + MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo); +} + void MipsTargetAsmStreamer::emitDirectiveSetNoAt() { OS << "\t.set\tnoat\n"; MipsTargetStreamer::emitDirectiveSetNoAt(); @@ -184,6 +209,11 @@ void MipsTargetAsmStreamer::emitDirectiveOptionPic2() { OS << "\t.option\tpic2\n"; } +void MipsTargetAsmStreamer::emitDirectiveInsn() { + MipsTargetStreamer::emitDirectiveInsn(); + OS << "\t.insn\n"; +} + void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) { OS << "\t.frame\t$" @@ -192,6 +222,16 @@ void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize, << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n'; } +void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) { + OS << "\t.set arch=" << Arch << "\n"; + MipsTargetStreamer::emitDirectiveSetArch(Arch); +} + +void MipsTargetAsmStreamer::emitDirectiveSetMips0() { + OS << "\t.set\tmips0\n"; + MipsTargetStreamer::emitDirectiveSetMips0(); +} + void MipsTargetAsmStreamer::emitDirectiveSetMips1() { OS << "\t.set\tmips1\n"; MipsTargetStreamer::emitDirectiveSetMips1(); @@ -227,6 +267,16 @@ void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() { MipsTargetStreamer::emitDirectiveSetMips32R2(); } +void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() { + OS << "\t.set\tmips32r3\n"; + MipsTargetStreamer::emitDirectiveSetMips32R3(); +} + +void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() { + OS << "\t.set\tmips32r5\n"; + MipsTargetStreamer::emitDirectiveSetMips32R5(); +} + void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() { OS << "\t.set\tmips32r6\n"; MipsTargetStreamer::emitDirectiveSetMips32R6(); @@ -242,6 +292,16 @@ void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() { MipsTargetStreamer::emitDirectiveSetMips64R2(); } +void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() { + OS << "\t.set\tmips64r3\n"; + MipsTargetStreamer::emitDirectiveSetMips64R3(); +} + +void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() { + OS << "\t.set\tmips64r5\n"; + MipsTargetStreamer::emitDirectiveSetMips64R5(); +} + void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() { OS << "\t.set\tmips64r6\n"; MipsTargetStreamer::emitDirectiveSetMips64R6(); @@ -251,6 +311,32 @@ void MipsTargetAsmStreamer::emitDirectiveSetDsp() { OS << "\t.set\tdsp\n"; MipsTargetStreamer::emitDirectiveSetDsp(); } + +void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() { + OS << "\t.set\tnodsp\n"; + MipsTargetStreamer::emitDirectiveSetNoDsp(); +} + +void MipsTargetAsmStreamer::emitDirectiveSetPop() { + OS << "\t.set\tpop\n"; + MipsTargetStreamer::emitDirectiveSetPop(); +} + +void MipsTargetAsmStreamer::emitDirectiveSetPush() { + OS << "\t.set\tpush\n"; + MipsTargetStreamer::emitDirectiveSetPush(); +} + +void MipsTargetAsmStreamer::emitDirectiveSetSoftFloat() { + OS << "\t.set\tsoftfloat\n"; + MipsTargetStreamer::emitDirectiveSetSoftFloat(); +} + +void MipsTargetAsmStreamer::emitDirectiveSetHardFloat() { + OS << "\t.set\thardfloat\n"; + MipsTargetStreamer::emitDirectiveSetHardFloat(); +} + // Print a 32 bit hex number with all numbers. static void printHex32(unsigned Value, raw_ostream &OS) { OS << "0x"; @@ -272,10 +358,16 @@ void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask, OS << "," << FPUTopSavedRegOff << '\n'; } -void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) { +void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) { OS << "\t.cpload\t$" << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n"; - setCanHaveModuleDir(false); + forbidModuleDirective(); +} + +void MipsTargetAsmStreamer::emitDirectiveCpRestore( + SmallVector &StoreInsts, int Offset) { + MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset); + OS << "\t.cprestore\t" << Offset << "\n"; } void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo, @@ -293,35 +385,51 @@ void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo, OS << ", "; - OS << Sym.getName() << "\n"; - setCanHaveModuleDir(false); + OS << Sym.getName(); + forbidModuleDirective(); } -void MipsTargetAsmStreamer::emitDirectiveModuleFP( - MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) { - MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI); +void MipsTargetAsmStreamer::emitDirectiveCpreturn(unsigned SaveLocation, + bool SaveLocationIsRegister) { + OS << "\t.cpreturn"; + forbidModuleDirective(); +} - StringRef ModuleValue; +void MipsTargetAsmStreamer::emitDirectiveModuleFP() { OS << "\t.module\tfp="; - OS << ABIFlagsSection.getFpABIString(Value) << "\n"; + OS << ABIFlagsSection.getFpABIString(ABIFlagsSection.getFpABI()) << "\n"; } void MipsTargetAsmStreamer::emitDirectiveSetFp( MipsABIFlagsSection::FpABIKind Value) { - StringRef ModuleValue; + MipsTargetStreamer::emitDirectiveSetFp(Value); + OS << "\t.set\tfp="; OS << ABIFlagsSection.getFpABIString(Value) << "\n"; } -void MipsTargetAsmStreamer::emitMipsAbiFlags() { - // No action required for text output. +void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg() { + MipsTargetStreamer::emitDirectiveModuleOddSPReg(); + + OS << "\t.module\t" << (ABIFlagsSection.OddSPReg ? "" : "no") << "oddspreg\n"; +} + +void MipsTargetAsmStreamer::emitDirectiveSetOddSPReg() { + MipsTargetStreamer::emitDirectiveSetOddSPReg(); + OS << "\t.set\toddspreg\n"; +} + +void MipsTargetAsmStreamer::emitDirectiveSetNoOddSPReg() { + MipsTargetStreamer::emitDirectiveSetNoOddSPReg(); + OS << "\t.set\tnooddspreg\n"; } -void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled, - bool IsO32ABI) { - MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI); +void MipsTargetAsmStreamer::emitDirectiveModuleSoftFloat() { + OS << "\t.module\tsoftfloat\n"; +} - OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n"; +void MipsTargetAsmStreamer::emitDirectiveModuleHardFloat() { + OS << "\t.module\thardfloat\n"; } // This part is for ELF object output. @@ -329,77 +437,72 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI) : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) { MCAssembler &MCA = getStreamer().getAssembler(); - uint64_t Features = STI.getFeatureBits(); - Triple T(STI.getTargetTriple()); - Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_) - ? true - : false; - - // Update e_header flags - unsigned EFlags = 0; + Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_; + + const FeatureBitset &Features = STI.getFeatureBits(); + + // Set the header flags that we can in the constructor. + // FIXME: This is a fairly terrible hack. We set the rest + // of these in the destructor. The problem here is two-fold: + // + // a: Some of the eflags can be set/reset by directives. + // b: There aren't any usage paths that initialize the ABI + // pointer until after we initialize either an assembler + // or the target machine. + // We can fix this by making the target streamer construct + // the ABI, but this is fraught with wide ranging dependency + // issues as well. + unsigned EFlags = MCA.getELFHeaderEFlags(); // Architecture - if (Features & Mips::FeatureMips64r6) + if (Features[Mips::FeatureMips64r6]) EFlags |= ELF::EF_MIPS_ARCH_64R6; - else if (Features & Mips::FeatureMips64r2) + else if (Features[Mips::FeatureMips64r2] || + Features[Mips::FeatureMips64r3] || + Features[Mips::FeatureMips64r5]) EFlags |= ELF::EF_MIPS_ARCH_64R2; - else if (Features & Mips::FeatureMips64) + else if (Features[Mips::FeatureMips64]) EFlags |= ELF::EF_MIPS_ARCH_64; - else if (Features & Mips::FeatureMips5) + else if (Features[Mips::FeatureMips5]) EFlags |= ELF::EF_MIPS_ARCH_5; - else if (Features & Mips::FeatureMips4) + else if (Features[Mips::FeatureMips4]) EFlags |= ELF::EF_MIPS_ARCH_4; - else if (Features & Mips::FeatureMips3) + else if (Features[Mips::FeatureMips3]) EFlags |= ELF::EF_MIPS_ARCH_3; - else if (Features & Mips::FeatureMips32r6) + else if (Features[Mips::FeatureMips32r6]) EFlags |= ELF::EF_MIPS_ARCH_32R6; - else if (Features & Mips::FeatureMips32r2) + else if (Features[Mips::FeatureMips32r2] || + Features[Mips::FeatureMips32r3] || + Features[Mips::FeatureMips32r5]) EFlags |= ELF::EF_MIPS_ARCH_32R2; - else if (Features & Mips::FeatureMips32) + else if (Features[Mips::FeatureMips32]) EFlags |= ELF::EF_MIPS_ARCH_32; - else if (Features & Mips::FeatureMips2) + else if (Features[Mips::FeatureMips2]) EFlags |= ELF::EF_MIPS_ARCH_2; else EFlags |= ELF::EF_MIPS_ARCH_1; - // ABI - // N64 does not require any ABI bits. - if (Features & Mips::FeatureO32) - EFlags |= ELF::EF_MIPS_ABI_O32; - else if (Features & Mips::FeatureN32) - EFlags |= ELF::EF_MIPS_ABI2; - - if (Features & Mips::FeatureGP64Bit) { - if (Features & Mips::FeatureO32) - EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */ - } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64) - EFlags |= ELF::EF_MIPS_32BITMODE; - // Other options. - if (Features & Mips::FeatureNaN2008) + if (Features[Mips::FeatureNaN2008]) EFlags |= ELF::EF_MIPS_NAN2008; // -mabicalls and -mplt are not implemented but we should act as if they were // given. EFlags |= ELF::EF_MIPS_CPIC; - if (Features & Mips::FeatureN64) - EFlags |= ELF::EF_MIPS_PIC; MCA.setELFHeaderEFlags(EFlags); } -void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) { +void MipsTargetELFStreamer::emitLabel(MCSymbol *S) { + auto *Symbol = cast(S); if (!isMicroMipsEnabled()) return; - MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol); - uint8_t Type = MCELF::GetType(Data); + getStreamer().getAssembler().registerSymbol(*Symbol); + uint8_t Type = Symbol->getType(); if (Type != ELF::STT_FUNC) return; - // The "other" values are stored in the last 6 bits of the second byte - // The traditional defines for STO values assume the full byte and thus - // the shift to pack it. - MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2); + Symbol->setOther(ELF::STO_MIPS_MICROMIPS); } void MipsTargetELFStreamer::finish() { @@ -407,16 +510,42 @@ void MipsTargetELFStreamer::finish() { const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo(); // .bss, .text and .data are always at least 16-byte aligned. - MCSectionData &TextSectionData = - MCA.getOrCreateSectionData(*OFI.getTextSection()); - MCSectionData &DataSectionData = - MCA.getOrCreateSectionData(*OFI.getDataSection()); - MCSectionData &BSSSectionData = - MCA.getOrCreateSectionData(*OFI.getBSSSection()); + MCSection &TextSection = *OFI.getTextSection(); + MCA.registerSection(TextSection); + MCSection &DataSection = *OFI.getDataSection(); + MCA.registerSection(DataSection); + MCSection &BSSSection = *OFI.getBSSSection(); + MCA.registerSection(BSSSection); + + TextSection.setAlignment(std::max(16u, TextSection.getAlignment())); + DataSection.setAlignment(std::max(16u, DataSection.getAlignment())); + BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment())); + + const FeatureBitset &Features = STI.getFeatureBits(); - TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment())); - DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment())); - BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment())); + // Update e_header flags. See the FIXME and comment above in + // the constructor for a full rundown on this. + unsigned EFlags = MCA.getELFHeaderEFlags(); + + // ABI + // N64 does not require any ABI bits. + if (getABI().IsO32()) + EFlags |= ELF::EF_MIPS_ABI_O32; + else if (getABI().IsN32()) + EFlags |= ELF::EF_MIPS_ABI2; + + if (Features[Mips::FeatureGP64Bit]) { + if (getABI().IsO32()) + EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */ + } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64]) + EFlags |= ELF::EF_MIPS_32BITMODE; + + // If we've set the cpic eflag and we're n64, go ahead and set the pic + // one as well. + if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64()) + EFlags |= ELF::EF_MIPS_PIC; + + MCA.setELFHeaderEFlags(EFlags); // Emit all the option records. // At the moment we are only emitting .Mips.options (ODK_REGINFO) and @@ -427,24 +556,18 @@ void MipsTargetELFStreamer::finish() { emitMipsAbiFlags(); } -void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol, - const MCExpr *Value) { +void MipsTargetELFStreamer::emitAssignment(MCSymbol *S, const MCExpr *Value) { + auto *Symbol = cast(S); // If on rhs is micromips symbol then mark Symbol as microMips. if (Value->getKind() != MCExpr::SymbolRef) return; - const MCSymbol &RhsSym = - static_cast(Value)->getSymbol(); - MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym); - uint8_t Type = MCELF::GetType(Data); - if ((Type != ELF::STT_FUNC) || - !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2))) + const auto &RhsSym = cast( + static_cast(Value)->getSymbol()); + + if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS)) return; - MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol); - // The "other" values are stored in the last 6 bits of the second byte. - // The traditional defines for STO values assume the full byte and thus - // the shift to pack it. - MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2); + Symbol->setOther(ELF::STO_MIPS_MICROMIPS); } MCELFStreamer &MipsTargetELFStreamer::getStreamer() { @@ -458,12 +581,12 @@ void MipsTargetELFStreamer::emitDirectiveSetMicroMips() { unsigned Flags = MCA.getELFHeaderEFlags(); Flags |= ELF::EF_MIPS_MICROMIPS; MCA.setELFHeaderEFlags(Flags); - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() { MicroMipsEnabled = false; - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetELFStreamer::emitDirectiveSetMips16() { @@ -471,7 +594,7 @@ void MipsTargetELFStreamer::emitDirectiveSetMips16() { unsigned Flags = MCA.getELFHeaderEFlags(); Flags |= ELF::EF_MIPS_ARCH_ASE_M16; MCA.setELFHeaderEFlags(Flags); - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetELFStreamer::emitDirectiveSetNoReorder() { @@ -479,7 +602,7 @@ void MipsTargetELFStreamer::emitDirectiveSetNoReorder() { unsigned Flags = MCA.getELFHeaderEFlags(); Flags |= ELF::EF_MIPS_NOREORDER; MCA.setELFHeaderEFlags(Flags); - setCanHaveModuleDir(false); + forbidModuleDirective(); } void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) { @@ -487,15 +610,15 @@ void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) { MCContext &Context = MCA.getContext(); MCStreamer &OS = getStreamer(); - const MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS, - ELF::SHF_ALLOC | ELF::SHT_REL, - SectionKind::getMetadata()); + MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHT_REL); + MCSymbol *Sym = Context.getOrCreateSymbol(Name); const MCSymbolRefExpr *ExprRef = - MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context); + MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, Context); - MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec); - SecData.setAlignment(4); + MCA.registerSection(*Sec); + Sec->setAlignment(4); OS.PushSection(); @@ -518,10 +641,25 @@ void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) { GPRInfoSet = FPRInfoSet = FrameInfoSet = false; OS.PopSection(); + + // .end also implicitly sets the size. + MCSymbol *CurPCSym = Context.createTempSymbol(); + OS.EmitLabel(CurPCSym); + const MCExpr *Size = MCBinaryExpr::createSub( + MCSymbolRefExpr::create(CurPCSym, MCSymbolRefExpr::VK_None, Context), + ExprRef, Context); + int64_t AbsSize; + if (!Size->evaluateAsAbsolute(AbsSize, MCA)) + llvm_unreachable("Function size must be evaluatable as absolute"); + Size = MCConstantExpr::create(AbsSize, Context); + static_cast(Sym)->setSize(Size); } void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) { GPRInfoSet = FPRInfoSet = FrameInfoSet = false; + + // .ent also acts like an implicit '.type symbol, STT_FUNC' + static_cast(Symbol).setType(ELF::STT_FUNC); } void MipsTargetELFStreamer::emitDirectiveAbiCalls() { @@ -566,6 +704,12 @@ void MipsTargetELFStreamer::emitDirectiveOptionPic2() { MCA.setELFHeaderEFlags(Flags); } +void MipsTargetELFStreamer::emitDirectiveInsn() { + MipsTargetStreamer::emitDirectiveInsn(); + MipsELFStreamer &MEF = static_cast(Streamer); + MEF.createPendingLabelRelocs(); +} + void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg_) { MCContext &Context = getStreamer().getAssembler().getContext(); @@ -591,14 +735,14 @@ void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask, FPROffset = FPUTopSavedRegOff; } -void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) { +void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) { // .cpload $reg // This directive expands to: // lui $gp, %hi(_gp_disp) // addui $gp, $gp, %lo(_gp_disp) // addu $gp, $gp, $reg // when support for position independent code is enabled. - if (!Pic || (isN32() || isN64())) + if (!Pic || (getABI().IsN32() || getABI().IsN64())) return; // There's a GNU extension controlled by -mno-shared that allows @@ -610,36 +754,54 @@ void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) { StringRef SymName("_gp_disp"); MCAssembler &MCA = getStreamer().getAssembler(); - MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName); - MCA.getOrCreateSymbolData(*GP_Disp); + MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName); + MCA.registerSymbol(*GP_Disp); MCInst TmpInst; TmpInst.setOpcode(Mips::LUi); - TmpInst.addOperand(MCOperand::CreateReg(Mips::GP)); - const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create( + TmpInst.addOperand(MCOperand::createReg(Mips::GP)); + const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::create( "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext()); - TmpInst.addOperand(MCOperand::CreateExpr(HiSym)); + TmpInst.addOperand(MCOperand::createExpr(HiSym)); getStreamer().EmitInstruction(TmpInst, STI); TmpInst.clear(); TmpInst.setOpcode(Mips::ADDiu); - TmpInst.addOperand(MCOperand::CreateReg(Mips::GP)); - TmpInst.addOperand(MCOperand::CreateReg(Mips::GP)); - const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create( + TmpInst.addOperand(MCOperand::createReg(Mips::GP)); + TmpInst.addOperand(MCOperand::createReg(Mips::GP)); + const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::create( "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext()); - TmpInst.addOperand(MCOperand::CreateExpr(LoSym)); + TmpInst.addOperand(MCOperand::createExpr(LoSym)); getStreamer().EmitInstruction(TmpInst, STI); TmpInst.clear(); TmpInst.setOpcode(Mips::ADDu); - TmpInst.addOperand(MCOperand::CreateReg(Mips::GP)); - TmpInst.addOperand(MCOperand::CreateReg(Mips::GP)); - TmpInst.addOperand(MCOperand::CreateReg(RegNo)); + TmpInst.addOperand(MCOperand::createReg(Mips::GP)); + TmpInst.addOperand(MCOperand::createReg(Mips::GP)); + TmpInst.addOperand(MCOperand::createReg(RegNo)); getStreamer().EmitInstruction(TmpInst, STI); - setCanHaveModuleDir(false); + forbidModuleDirective(); +} + +void MipsTargetELFStreamer::emitDirectiveCpRestore( + SmallVector &StoreInsts, int Offset) { + MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset); + // .cprestore offset + // When PIC mode is enabled and the O32 ABI is used, this directive expands + // to: + // sw $gp, offset($sp) + // and adds a corresponding LW after every JAL. + + // Note that .cprestore is ignored if used with the N32 and N64 ABIs or if it + // is used in non-PIC mode. + if (!Pic || (getABI().IsN32() || getABI().IsN64())) + return; + + for (const MCInst &Inst : StoreInsts) + getStreamer().EmitInstruction(Inst, STI); } void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo, @@ -647,7 +809,7 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo, const MCSymbol &Sym, bool IsReg) { // Only N32 and N64 emit anything for .cpsetup iff PIC is set. - if (!Pic || !(isN32() || isN64())) + if (!Pic || !(getABI().IsN32() || getABI().IsN64())) return; MCAssembler &MCA = getStreamer().getAssembler(); @@ -656,66 +818,83 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo, // Either store the old $gp in a register or on the stack if (IsReg) { // move $save, $gpreg - Inst.setOpcode(Mips::DADDu); - Inst.addOperand(MCOperand::CreateReg(RegOrOffset)); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateReg(Mips::ZERO)); + Inst.setOpcode(Mips::OR64); + Inst.addOperand(MCOperand::createReg(RegOrOffset)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(Mips::ZERO)); } else { // sd $gpreg, offset($sp) Inst.setOpcode(Mips::SD); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateReg(Mips::SP)); - Inst.addOperand(MCOperand::CreateImm(RegOrOffset)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(Mips::SP)); + Inst.addOperand(MCOperand::createImm(RegOrOffset)); } getStreamer().EmitInstruction(Inst, STI); Inst.clear(); - const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create( - Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext()); - const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create( - Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext()); + const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::create( + &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext()); + const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::create( + &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext()); + // lui $gp, %hi(%neg(%gp_rel(funcSym))) Inst.setOpcode(Mips::LUi); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateExpr(HiExpr)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createExpr(HiExpr)); getStreamer().EmitInstruction(Inst, STI); Inst.clear(); // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym))) Inst.setOpcode(Mips::ADDiu); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateExpr(LoExpr)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createExpr(LoExpr)); getStreamer().EmitInstruction(Inst, STI); Inst.clear(); // daddu $gp, $gp, $funcreg Inst.setOpcode(Mips::DADDu); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateReg(Mips::GP)); - Inst.addOperand(MCOperand::CreateReg(RegNo)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(RegNo)); getStreamer().EmitInstruction(Inst, STI); - setCanHaveModuleDir(false); + forbidModuleDirective(); +} + +void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation, + bool SaveLocationIsRegister) { + // Only N32 and N64 emit anything for .cpreturn iff PIC is set. + if (!Pic || !(getABI().IsN32() || getABI().IsN64())) + return; + + MCInst Inst; + // Either restore the old $gp from a register or on the stack + if (SaveLocationIsRegister) { + Inst.setOpcode(Mips::OR); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(SaveLocation)); + Inst.addOperand(MCOperand::createReg(Mips::ZERO)); + } else { + Inst.setOpcode(Mips::LD); + Inst.addOperand(MCOperand::createReg(Mips::GP)); + Inst.addOperand(MCOperand::createReg(Mips::SP)); + Inst.addOperand(MCOperand::createImm(SaveLocation)); + } + getStreamer().EmitInstruction(Inst, STI); + + forbidModuleDirective(); } void MipsTargetELFStreamer::emitMipsAbiFlags() { MCAssembler &MCA = getStreamer().getAssembler(); MCContext &Context = MCA.getContext(); MCStreamer &OS = getStreamer(); - const MCSectionELF *Sec = - Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, - ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, ""); - MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec); - ABIShndxSD.setAlignment(8); + MCSectionELF *Sec = Context.getELFSection( + ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, ""); + MCA.registerSection(*Sec); + Sec->setAlignment(8); OS.SwitchSection(Sec); OS << ABIFlagsSection; } - -void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled, - bool IsO32ABI) { - MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI); - - ABIFlagsSection.OddSPReg = Enabled; -}