X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FARM%2FCMakeLists.txt;h=0b6981979cfaea05914700d7ffda0429a75a6557;hb=f09378397e2ed3d2e916e321c528c1cfd0ec67ca;hp=edc0054468ea69a51f950671226d93292ee07986;hpb=2fc689888623743502b62e979767dd5c71e692bb;p=oota-llvm.git diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index edc0054468e..0b6981979cf 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -1,70 +1,53 @@ set(LLVM_TARGET_DEFINITIONS ARM.td) -tablegen(ARMGenRegisterInfo.h.inc -gen-register-desc-header) -tablegen(ARMGenRegisterNames.inc -gen-register-enums) -tablegen(ARMGenRegisterInfo.inc -gen-register-desc) -tablegen(ARMGenInstrNames.inc -gen-instr-enums) -tablegen(ARMGenInstrInfo.inc -gen-instr-desc) -tablegen(ARMGenCodeEmitter.inc -gen-emitter) -tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter) -tablegen(ARMGenAsmWriter.inc -gen-asm-writer) -tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher) -tablegen(ARMGenDAGISel.inc -gen-dag-isel) -tablegen(ARMGenFastISel.inc -gen-fast-isel) -tablegen(ARMGenCallingConv.inc -gen-callingconv) -tablegen(ARMGenSubtarget.inc -gen-subtarget) -tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) -tablegen(ARMGenDecoderTables.inc -gen-arm-decoder) +tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info) +tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info) +tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter) +tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering) +tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer) +tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher) +tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel) +tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel) +tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv) +tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler) +add_public_tablegen_target(ARMCommonTableGen) add_llvm_target(ARMCodeGen - ARMAsmBackend.cpp + A15SDOptimizer.cpp ARMAsmPrinter.cpp ARMBaseInstrInfo.cpp ARMBaseRegisterInfo.cpp - ARMCodeEmitter.cpp ARMConstantIslandPass.cpp ARMConstantPoolValue.cpp - ARMELFWriterInfo.cpp ARMExpandPseudoInsts.cpp ARMFastISel.cpp ARMFrameLowering.cpp - ARMGlobalMerge.cpp ARMHazardRecognizer.cpp ARMISelDAGToDAG.cpp ARMISelLowering.cpp ARMInstrInfo.cpp - ARMJITInfo.cpp - ARMMachObjectWriter.cpp - ARMMCCodeEmitter.cpp - ARMMCExpr.cpp ARMLoadStoreOptimizer.cpp - ARMMCAsmInfo.cpp ARMMCInstLower.cpp + ARMMachineFunctionInfo.cpp ARMRegisterInfo.cpp + ARMOptimizeBarriersPass.cpp ARMSelectionDAGInfo.cpp ARMSubtarget.cpp ARMTargetMachine.cpp ARMTargetObjectFile.cpp + ARMTargetTransformInfo.cpp MLxExpansionPass.cpp - NEONMoveFix.cpp - Thumb1InstrInfo.cpp Thumb1FrameLowering.cpp - Thumb1RegisterInfo.cpp + Thumb1InstrInfo.cpp + ThumbRegisterInfo.cpp Thumb2ITBlockPass.cpp Thumb2InstrInfo.cpp - Thumb2RegisterInfo.cpp Thumb2SizeReduction.cpp ) -# workaround for hanging compilation on MSVC10 -if( MSVC_VERSION EQUAL 1600 ) -set_property( - SOURCE ARMISelLowering.cpp - PROPERTY COMPILE_FLAGS "/Od" - ) -endif() - add_subdirectory(TargetInfo) add_subdirectory(AsmParser) add_subdirectory(Disassembler) add_subdirectory(InstPrinter) +add_subdirectory(MCTargetDesc)