X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FARM%2FARMHazardRecognizer.h;h=98bfc4cf0cc552947deaad6e417c7875bfd390c3;hb=ddfd1377d2e4154d44dc3ad217735adc15af2e3f;hp=d1919d8cf49feda2c649198f305aabc64c2e7b66;hpb=48575f6ea7d5cd21ab29ca370f58fcf9ca31400b;p=oota-llvm.git

diff --git a/lib/Target/ARM/ARMHazardRecognizer.h b/lib/Target/ARM/ARMHazardRecognizer.h
index d1919d8cf49..98bfc4cf0cc 100644
--- a/lib/Target/ARM/ARMHazardRecognizer.h
+++ b/lib/Target/ARM/ARMHazardRecognizer.h
@@ -14,7 +14,7 @@
 #ifndef ARMHAZARDRECOGNIZER_H
 #define ARMHAZARDRECOGNIZER_H
 
-#include "llvm/CodeGen/PostRAHazardRecognizer.h"
+#include "llvm/CodeGen/ScoreboardHazardRecognizer.h"
 
 namespace llvm {
 
@@ -23,31 +23,34 @@ class ARMBaseRegisterInfo;
 class ARMSubtarget;
 class MachineInstr;
 
-class ARMHazardRecognizer : public PostRAHazardRecognizer {
+/// ARMHazardRecognizer handles special constraints that are not expressed in
+/// the scheduling itinerary. This is only used during postRA scheduling. The
+/// ARM preRA scheduler uses an unspecialized instance of the
+/// ScoreboardHazardRecognizer.
+class ARMHazardRecognizer : public ScoreboardHazardRecognizer {
   const ARMBaseInstrInfo &TII;
   const ARMBaseRegisterInfo &TRI;
   const ARMSubtarget &STI;
 
   MachineInstr *LastMI;
-  unsigned Stalls;
-  unsigned ITBlockSize;  // No. of MIs in current IT block yet to be scheduled.
-  MachineInstr *ITBlockMIs[4];
+  unsigned FpMLxStalls;
 
 public:
   ARMHazardRecognizer(const InstrItineraryData *ItinData,
                       const ARMBaseInstrInfo &tii,
                       const ARMBaseRegisterInfo &tri,
-                      const ARMSubtarget &sti) :
-    PostRAHazardRecognizer(ItinData), TII(tii), TRI(tri), STI(sti),
-    LastMI(0), ITBlockSize(0) {}
+                      const ARMSubtarget &sti,
+                      const ScheduleDAG *DAG) :
+    ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii),
+    TRI(tri), STI(sti), LastMI(0) {}
 
-  virtual HazardType getHazardType(SUnit *SU);
+  virtual HazardType getHazardType(SUnit *SU, int Stalls);
   virtual void Reset();
   virtual void EmitInstruction(SUnit *SU);
   virtual void AdvanceCycle();
+  virtual void RecedeCycle();
 };
 
-
 } // end namespace llvm
 
 #endif // ARMHAZARDRECOGNIZER_H