X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FAArch64%2FAArch64Subtarget.h;h=b2cd0cd573836b65b48514570948d1519b5e8bb2;hb=8f09464bc9f040f84a832f711ac66965f1dbe10a;hp=cfb126ebf1395a608003250090047aff5250a2fe;hpb=30ad4cb09b17d0bb73b1815a3503c4d683445ff1;p=oota-llvm.git diff --git a/lib/Target/AArch64/AArch64Subtarget.h b/lib/Target/AArch64/AArch64Subtarget.h index cfb126ebf13..b2cd0cd5738 100644 --- a/lib/Target/AArch64/AArch64Subtarget.h +++ b/lib/Target/AArch64/AArch64Subtarget.h @@ -11,10 +11,12 @@ // //===----------------------------------------------------------------------===// -#ifndef AArch64SUBTARGET_H -#define AArch64SUBTARGET_H +#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H +#define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H #include "AArch64FrameLowering.h" +#include "AArch64ISelLowering.h" +#include "AArch64InstrInfo.h" #include "AArch64RegisterInfo.h" #include "AArch64SelectionDAGInfo.h" #include "llvm/IR/DataLayout.h" @@ -54,20 +56,40 @@ protected: const DataLayout DL; AArch64FrameLowering FrameLowering; + AArch64InstrInfo InstrInfo; AArch64SelectionDAGInfo TSInfo; + AArch64TargetLowering TLInfo; +private: + /// initializeSubtargetDependencies - Initializes using CPUString and the + /// passed in feature string so that we can use initializer lists for + /// subtarget initialization. + AArch64Subtarget &initializeSubtargetDependencies(StringRef FS); public: /// This constructor initializes the data members to match that /// of the specified triple. AArch64Subtarget(const std::string &TT, const std::string &CPU, - const std::string &FS, bool LittleEndian); + const std::string &FS, const TargetMachine &TM, + bool LittleEndian); - const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; } - const AArch64FrameLowering *getFrameLowering() const { + const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override { + return &TSInfo; + } + const AArch64FrameLowering *getFrameLowering() const override { return &FrameLowering; } - const DataLayout *getDataLayout() const { return &DL; } + const AArch64TargetLowering *getTargetLowering() const override { + return &TLInfo; + } + const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; } + const DataLayout *getDataLayout() const override { return &DL; } + const AArch64RegisterInfo *getRegisterInfo() const override { + return &getInstrInfo()->getRegisterInfo(); + } bool enableMachineScheduler() const override { return true; } + bool enablePostMachineScheduler() const override { + return isCortexA53() || isCortexA57(); + } bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; } @@ -81,12 +103,19 @@ public: bool isLittleEndian() const { return DL.isLittleEndian(); } bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); } + bool isTargetIOS() const { return TargetTriple.isiOS(); } + bool isTargetLinux() const { return TargetTriple.isOSLinux(); } + bool isTargetWindows() const { return TargetTriple.isOSWindows(); } + bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); } bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); } - bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); } bool isCyclone() const { return CPUString == "cyclone"; } + bool isCortexA57() const { return CPUString == "cortex-a57"; } + bool isCortexA53() const { return CPUString == "cortex-a53"; } + + bool useAA() const override { return isCortexA53() || isCortexA57(); } /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size /// that still makes it profitable to inline the call. @@ -116,4 +145,4 @@ public: }; } // End llvm namespace -#endif // AArch64SUBTARGET_H +#endif