X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FObject%2FELFYAML.cpp;h=4a4b2276f46b5dfecc93e7c6ac58c1788502eaaf;hb=7cd8652959dda0b52548d3bbc3dab53e85cd45f9;hp=50730a99655ce0198412b0c58ca0fdae13b6bee5;hpb=cf0db29df20d9c665da7e82bb261bdd7cf7f1b2b;p=oota-llvm.git diff --git a/lib/Object/ELFYAML.cpp b/lib/Object/ELFYAML.cpp index 50730a99655..4a4b2276f46 100644 --- a/lib/Object/ELFYAML.cpp +++ b/lib/Object/ELFYAML.cpp @@ -193,6 +193,7 @@ ScalarEnumerationTraits::enumeration(IO &IO, ECase(EM_VIDEOCORE5) ECase(EM_78KOR) ECase(EM_56800EX) + ECase(EM_AMDGPU) #undef ECase } @@ -316,6 +317,25 @@ void ScalarBitSetTraits::bitset(IO &IO, BCase(EF_HEXAGON_ISA_V4) BCase(EF_HEXAGON_ISA_V5) break; + case ELF::EM_AVR: + BCase(EF_AVR_ARCH_AVR1) + BCase(EF_AVR_ARCH_AVR2) + BCase(EF_AVR_ARCH_AVR25) + BCase(EF_AVR_ARCH_AVR3) + BCase(EF_AVR_ARCH_AVR31) + BCase(EF_AVR_ARCH_AVR35) + BCase(EF_AVR_ARCH_AVR4) + BCase(EF_AVR_ARCH_AVR51) + BCase(EF_AVR_ARCH_AVR6) + BCase(EF_AVR_ARCH_AVRTINY) + BCase(EF_AVR_ARCH_XMEGA1) + BCase(EF_AVR_ARCH_XMEGA2) + BCase(EF_AVR_ARCH_XMEGA3) + BCase(EF_AVR_ARCH_XMEGA4) + BCase(EF_AVR_ARCH_XMEGA5) + BCase(EF_AVR_ARCH_XMEGA6) + BCase(EF_AVR_ARCH_XMEGA7) + break; default: llvm_unreachable("Unsupported architecture"); } @@ -382,6 +402,7 @@ void ScalarEnumerationTraits::enumeration( void ScalarBitSetTraits::bitset(IO &IO, ELFYAML::ELF_SHF &Value) { + const auto *Object = static_cast(IO.getContext()); #define BCase(X) IO.bitSetCase(Value, #X, ELF::X); BCase(SHF_WRITE) BCase(SHF_ALLOC) @@ -394,6 +415,17 @@ void ScalarBitSetTraits::bitset(IO &IO, BCase(SHF_OS_NONCONFORMING) BCase(SHF_GROUP) BCase(SHF_TLS) + switch(Object->Header.Machine) { + case ELF::EM_AMDGPU: + BCase(SHF_AMDGPU_HSA_GLOBAL) + BCase(SHF_AMDGPU_HSA_READONLY) + BCase(SHF_AMDGPU_HSA_CODE) + BCase(SHF_AMDGPU_HSA_AGENT) + break; + default: + // Nothing to do. + break; + } #undef BCase } @@ -466,6 +498,7 @@ void ScalarEnumerationTraits::enumeration( #include "llvm/Support/ELFRelocs/Hexagon.def" break; case ELF::EM_386: + case ELF::EM_IAMCU: #include "llvm/Support/ELFRelocs/i386.def" break; case ELF::EM_AARCH64: @@ -590,7 +623,7 @@ struct NormalizedOther { ELFYAML::ELF_STV Visibility; ELFYAML::ELF_STO Other; }; -} // namespace +} void MappingTraits::mapping(IO &IO, ELFYAML::Symbol &Symbol) { IO.mapOptional("Name", Symbol.Name, StringRef()); @@ -627,6 +660,11 @@ static void sectionMapping(IO &IO, ELFYAML::RawContentSection &Section) { IO.mapOptional("Size", Section.Size, Hex64(Section.Content.binary_size())); } +static void sectionMapping(IO &IO, ELFYAML::NoBitsSection &Section) { + commonSectionMapping(IO, Section); + IO.mapOptional("Size", Section.Size, Hex64(0)); +} + static void sectionMapping(IO &IO, ELFYAML::RelocationSection &Section) { commonSectionMapping(IO, Section); IO.mapOptional("Relocations", Section.Relocations); @@ -682,6 +720,11 @@ void MappingTraits>::mapping( Section.reset(new ELFYAML::Group()); groupSectionMapping(IO, *cast(Section.get())); break; + case ELF::SHT_NOBITS: + if (!IO.outputting()) + Section.reset(new ELFYAML::NoBitsSection()); + sectionMapping(IO, *cast(Section.get())); + break; case ELF::SHT_MIPS_ABIFLAGS: if (!IO.outputting()) Section.reset(new ELFYAML::MipsABIFlags()); @@ -723,7 +766,7 @@ struct NormalizedMips64RelType { ELFYAML::ELF_REL Type3; ELFYAML::ELF_RSS SpecSym; }; -} // namespace +} void MappingTraits::mapping(IO &IO, ELFYAML::Relocation &Rel) {