X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FRegAllocBasic.cpp;h=6bc678e8521190bed76f37429a18c5215abdbe42;hb=b78fd035a230c05e5cb6a7e0afdd3cbf7b3e9239;hp=0c958df3c5aeaead0d86a781ea703de70763fe35;hpb=d241fa7a61682a15b753c52afee07dfbf1b3bd1f;p=oota-llvm.git diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp index 0c958df3c5a..6bc678e8521 100644 --- a/lib/CodeGen/RegAllocBasic.cpp +++ b/lib/CodeGen/RegAllocBasic.cpp @@ -12,7 +12,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "regalloc" #include "llvm/CodeGen/Passes.h" #include "AllocationOrder.h" #include "LiveDebugVariables.h" @@ -41,6 +40,8 @@ using namespace llvm; +#define DEBUG_TYPE "regalloc" + static RegisterRegAlloc basicRegAlloc("basic", "basic register allocator", createBasicRegisterAllocator); @@ -64,7 +65,7 @@ class RABasic : public MachineFunctionPass, public RegAllocBase MachineFunction *MF; // state - OwningPtr SpillerInstance; + std::unique_ptr SpillerInstance; std::priority_queue, CompSpillWeight> Queue; @@ -76,36 +77,34 @@ public: RABasic(); /// Return the pass name. - virtual const char* getPassName() const { + const char* getPassName() const override { return "Basic Register Allocator"; } /// RABasic analysis usage. - virtual void getAnalysisUsage(AnalysisUsage &AU) const; + void getAnalysisUsage(AnalysisUsage &AU) const override; - virtual void releaseMemory(); + void releaseMemory() override; - virtual Spiller &spiller() { return *SpillerInstance; } + Spiller &spiller() override { return *SpillerInstance; } - virtual float getPriority(LiveInterval *LI) { return LI->weight; } - - virtual void enqueue(LiveInterval *LI) { + void enqueue(LiveInterval *LI) override { Queue.push(LI); } - virtual LiveInterval *dequeue() { + LiveInterval *dequeue() override { if (Queue.empty()) - return 0; + return nullptr; LiveInterval *LI = Queue.top(); Queue.pop(); return LI; } - virtual unsigned selectOrSplit(LiveInterval &VirtReg, - SmallVectorImpl &SplitVRegs); + unsigned selectOrSplit(LiveInterval &VirtReg, + SmallVectorImpl &SplitVRegs) override; /// Perform register allocation. - virtual bool runOnMachineFunction(MachineFunction &mf); + bool runOnMachineFunction(MachineFunction &mf) override; // Helper for spilling all live virtual registers currently unified under preg // that interfere with the most recently queried lvr. Return true if spilling @@ -126,7 +125,6 @@ RABasic::RABasic(): MachineFunctionPass(ID) { initializeSlotIndexesPass(*PassRegistry::getPassRegistry()); initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry()); initializeMachineSchedulerPass(*PassRegistry::getPassRegistry()); - initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry()); initializeLiveStacksPass(*PassRegistry::getPassRegistry()); initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry()); initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry()); @@ -143,7 +141,6 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved(); AU.addRequired(); AU.addPreserved(); - AU.addRequired(); AU.addRequired(); AU.addPreserved(); AU.addRequired(); @@ -160,7 +157,7 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const { } void RABasic::releaseMemory() { - SpillerInstance.reset(0); + SpillerInstance.reset(); } @@ -279,6 +276,11 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) { RegAllocBase::init(getAnalysis(), getAnalysis(), getAnalysis()); + + calculateSpillWeightsAndHints(*LIS, *MF, + getAnalysis(), + getAnalysis()); + SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM)); allocatePhysRegs();