X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FMachineBasicBlock.cpp;h=af91a2fb15c471b499892c3970543f17c82785ff;hb=f9d95c8835bc4f9072c33e1f9ebaa581a4d3268d;hp=a626f4fdd15ca8a5694091c21f13e698bfb8a653;hpb=bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f;p=oota-llvm.git diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index a626f4fdd15..af91a2fb15c 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -14,9 +14,9 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/BasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetInstrDesc.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/LeakDetector.h" #include @@ -31,21 +31,37 @@ std::ostream& llvm::operator<<(std::ostream &OS, const MachineBasicBlock &MBB) { return OS; } -// MBBs start out as #-1. When a MBB is added to a MachineFunction, it -// gets the next available unique MBB number. If it is removed from a -// MachineFunction, it goes back to being #-1. +/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the +/// parent pointer of the MBB, the MBB numbering, and any instructions in the +/// MBB to be on the right operand list for registers. +/// +/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it +/// gets the next available unique MBB number. If it is removed from a +/// MachineFunction, it goes back to being #-1. void ilist_traits::addNodeToList(MachineBasicBlock* N) { - assert(N->Parent == 0 && "machine instruction already in a basic block"); - N->Parent = Parent; + assert(N->getParent() == 0 && "machine instruction already in a basic block"); + N->setParent(Parent); N->Number = Parent->addToMBBNumbering(N); + + // Make sure the instructions have their operands in the reginfo lists. + MachineRegisterInfo &RegInfo = Parent->getRegInfo(); + for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I) + I->AddRegOperandsToUseLists(RegInfo); + LeakDetector::removeGarbageObject(N); } void ilist_traits::removeNodeFromList(MachineBasicBlock* N) { - assert(N->Parent != 0 && "machine instruction not in a basic block"); - N->Parent->removeFromMBBNumbering(N->Number); + assert(N->getParent() != 0 && "machine instruction not in a basic block"); + N->getParent()->removeFromMBBNumbering(N->Number); N->Number = -1; - N->Parent = 0; + N->setParent(0); + + // Make sure the instructions have their operands removed from the reginfo + // lists. + for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I) + I->RemoveRegOperandsFromUseLists(); + LeakDetector::addGarbageObject(N); } @@ -56,32 +72,69 @@ MachineInstr* ilist_traits::createSentinel() { return dummy; } +/// addNodeToList (MI) - When we add an instruction to a basic block +/// list, we update its parent pointer and add its operands from reg use/def +/// lists if appropriate. void ilist_traits::addNodeToList(MachineInstr* N) { - assert(N->parent == 0 && "machine instruction already in a basic block"); - N->parent = parent; + assert(N->getParent() == 0 && "machine instruction already in a basic block"); + N->setParent(parent); LeakDetector::removeGarbageObject(N); + + // If the block is in a function, add the instruction's register operands to + // their corresponding use/def lists. + if (MachineFunction *MF = parent->getParent()) + N->AddRegOperandsToUseLists(MF->getRegInfo()); } +/// removeNodeFromList (MI) - When we remove an instruction from a basic block +/// list, we update its parent pointer and remove its operands from reg use/def +/// lists if appropriate. void ilist_traits::removeNodeFromList(MachineInstr* N) { - assert(N->parent != 0 && "machine instruction not in a basic block"); - N->parent = 0; + assert(N->getParent() != 0 && "machine instruction not in a basic block"); + // If this block is in a function, remove from the use/def lists. + if (parent->getParent() != 0) + N->RemoveRegOperandsFromUseLists(); + + N->setParent(0); LeakDetector::addGarbageObject(N); } +/// transferNodesFromList (MI) - When moving a range of instructions from one +/// MBB list to another, we need to update the parent pointers and the use/def +/// lists. void ilist_traits::transferNodesFromList( - iplist >& fromList, - ilist_iterator first, - ilist_iterator last) { - if (parent != fromList.parent) + iplist >& fromList, + ilist_iterator first, + ilist_iterator last) { + // Splice within the same MBB -> no change. + if (parent == fromList.parent) return; + + // If splicing between two blocks within the same function, just update the + // parent pointers. + if (parent->getParent() == fromList.parent->getParent()) { for (; first != last; ++first) - first->parent = parent; + first->setParent(parent); + return; + } + + // Otherwise, we have to update the parent and the use/def lists. The common + // case when this occurs is if we're splicing from a block in a MF to a block + // that is not in an MF. + bool HasOldMF = fromList.parent->getParent() != 0; + MachineFunction *NewMF = parent->getParent(); + + for (; first != last; ++first) { + if (HasOldMF) first->RemoveRegOperandsFromUseLists(); + first->setParent(parent); + if (NewMF) first->AddRegOperandsToUseLists(NewMF->getRegInfo()); + } } MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() { - const TargetInstrInfo& TII = *getParent()->getTarget().getInstrInfo(); iterator I = end(); - while (I != begin() && TII.isTerminatorInstr((--I)->getOpcode())); - if (I != end() && !TII.isTerminatorInstr(I->getOpcode())) ++I; + while (I != begin() && (--I)->getDesc().isTerminator()) + ; /*noop */ + if (I != end() && !I->getDesc().isTerminator()) ++I; return I; } @@ -89,8 +142,20 @@ void MachineBasicBlock::dump() const { print(*cerr.stream()); } +static inline void OutputReg(std::ostream &os, unsigned RegNo, + const TargetRegisterInfo *TRI = 0) { + if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) { + if (TRI) + os << " %" << TRI->get(RegNo).Name; + else + os << " %mreg(" << RegNo << ")"; + } else + os << " %reg" << RegNo; +} + void MachineBasicBlock::print(std::ostream &OS) const { - if(!getParent()) { + const MachineFunction *MF = getParent(); + if(!MF) { OS << "Can't print out MachineBasicBlock because parent MachineFunction" << " is null\n"; return; @@ -98,14 +163,25 @@ void MachineBasicBlock::print(std::ostream &OS) const { const BasicBlock *LBB = getBasicBlock(); OS << "\n"; - if (LBB) OS << LBB->getName(); - OS << " (" << (const void*)this - << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber()<< "):\n"; + if (LBB) OS << LBB->getName() << ": "; + OS << (const void*)this + << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); + if (Alignment) OS << ", Alignment " << Alignment; + if (isLandingPad()) OS << ", EH LANDING PAD"; + OS << ":\n"; + + const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); + if (!livein_empty()) { + OS << "Live Ins:"; + for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I) + OutputReg(OS, *I, TRI); + OS << "\n"; + } // Print the preds of this block according to the CFG. if (!pred_empty()) { OS << " Predecessors according to CFG:"; for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) - OS << " " << *PI; + OS << " " << *PI << " (#" << (*PI)->getNumber() << ")"; OS << "\n"; } @@ -118,11 +194,17 @@ void MachineBasicBlock::print(std::ostream &OS) const { if (!succ_empty()) { OS << " Successors according to CFG:"; for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) - OS << " " << *SI; + OS << " " << *SI << " (#" << (*SI)->getNumber() << ")"; OS << "\n"; } } +void MachineBasicBlock::removeLiveIn(unsigned Reg) { + livein_iterator I = std::find(livein_begin(), livein_end(), Reg); + assert(I != livein_end() && "Not a live in!"); + LiveIns.erase(I); +} + void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) { MachineFunction::BasicBlockListType &BBList =getParent()->getBasicBlockList(); getParent()->getBasicBlockList().splice(NewAfter, BBList, this); @@ -147,10 +229,11 @@ void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) { Successors.erase(I); } -void MachineBasicBlock::removeSuccessor(succ_iterator I) { +MachineBasicBlock::succ_iterator +MachineBasicBlock::removeSuccessor(succ_iterator I) { assert(I != Successors.end() && "Not a current successor!"); (*I)->removePredecessor(this); - Successors.erase(I); + return(Successors.erase(I)); } void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) { @@ -163,3 +246,95 @@ void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) { assert(I != Predecessors.end() && "Pred is not a predecessor of this block!"); Predecessors.erase(I); } + +bool MachineBasicBlock::isSuccessor(MachineBasicBlock *MBB) const { + std::vector::const_iterator I = + std::find(Successors.begin(), Successors.end(), MBB); + return I != Successors.end(); +} + +/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to +/// 'Old', change the code and CFG so that it branches to 'New' instead. +void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old, + MachineBasicBlock *New) { + assert(Old != New && "Cannot replace self with self!"); + + MachineBasicBlock::iterator I = end(); + while (I != begin()) { + --I; + if (!I->getDesc().isTerminator()) break; + + // Scan the operands of this machine instruction, replacing any uses of Old + // with New. + for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) + if (I->getOperand(i).isMBB() && I->getOperand(i).getMBB() == Old) + I->getOperand(i).setMBB(New); + } + + // Update the successor information. If New was already a successor, just + // remove the link to Old instead of creating another one. PR 1444. + removeSuccessor(Old); + if (!isSuccessor(New)) + addSuccessor(New); +} + +/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the +/// CFG to be inserted. If we have proven that MBB can only branch to DestA and +/// DestB, remove any other MBB successors from the CFG. DestA and DestB can +/// be null. +/// Besides DestA and DestB, retain other edges leading to LandingPads +/// (currently there can be only one; we don't check or require that here). +/// Note it is possible that DestA and/or DestB are LandingPads. +bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA, + MachineBasicBlock *DestB, + bool isCond) { + bool MadeChange = false; + bool AddedFallThrough = false; + + MachineBasicBlock *FallThru = getNext(); + + // If this block ends with a conditional branch that falls through to its + // successor, set DestB as the successor. + if (isCond) { + if (DestB == 0 && FallThru != getParent()->end()) { + DestB = FallThru; + AddedFallThrough = true; + } + } else { + // If this is an unconditional branch with no explicit dest, it must just be + // a fallthrough into DestB. + if (DestA == 0 && FallThru != getParent()->end()) { + DestA = FallThru; + AddedFallThrough = true; + } + } + + MachineBasicBlock::succ_iterator SI = succ_begin(); + MachineBasicBlock *OrigDestA = DestA, *OrigDestB = DestB; + while (SI != succ_end()) { + if (*SI == DestA && DestA == DestB) { + DestA = DestB = 0; + ++SI; + } else if (*SI == DestA) { + DestA = 0; + ++SI; + } else if (*SI == DestB) { + DestB = 0; + ++SI; + } else if ((*SI)->isLandingPad() && + *SI!=OrigDestA && *SI!=OrigDestB) { + ++SI; + } else { + // Otherwise, this is a superfluous edge, remove it. + SI = removeSuccessor(SI); + MadeChange = true; + } + } + if (!AddedFallThrough) { + assert(DestA == 0 && DestB == 0 && + "MachineCFG is missing edges!"); + } else if (isCond) { + assert(DestA == 0 && "MachineCFG is missing edges!"); + } + return MadeChange; +}