X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FAggressiveAntiDepBreaker.h;h=12cf95b9b4f9bf30a0b3fe48374a8887425f6839;hb=9e4cbe62b16c0495438bface434cadb5284839b5;hp=c5121682bd637fe051c6504328046cb9e2962890;hpb=54097836f31660bd5e84c34ee8c92d237844315f;p=oota-llvm.git diff --git a/lib/CodeGen/AggressiveAntiDepBreaker.h b/lib/CodeGen/AggressiveAntiDepBreaker.h index c5121682bd6..12cf95b9b4f 100644 --- a/lib/CodeGen/AggressiveAntiDepBreaker.h +++ b/lib/CodeGen/AggressiveAntiDepBreaker.h @@ -14,159 +14,158 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H -#define LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H +#ifndef LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H +#define LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H #include "AntiDepBreaker.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/Target/TargetRegisterInfo.h" -#include "llvm/ADT/BitVector.h" -#include "llvm/ADT/SmallSet.h" +#include "llvm/Target/TargetSubtargetInfo.h" +#include namespace llvm { - /// Class AggressiveAntiDepState - /// Contains all the state necessary for anti-dep breaking. We place - /// into a separate class so be can conveniently save/restore it to - /// enable multi-pass anti-dep breaking. +class RegisterClassInfo; + + /// Contains all the state necessary for anti-dep breaking. class AggressiveAntiDepState { public: - /// RegisterReference - Information about a register reference - /// within a liverange + /// Information about a register reference within a liverange typedef struct { - /// Operand - The registers operand + /// The registers operand MachineOperand *Operand; - /// RC - The register class + /// The register class const TargetRegisterClass *RC; } RegisterReference; private: - /// GroupNodes - Implements a disjoint-union data structure to + /// Number of non-virtual target registers (i.e. TRI->getNumRegs()). + const unsigned NumTargetRegs; + + /// Implements a disjoint-union data structure to /// form register groups. A node is represented by an index into /// the vector. A node can "point to" itself to indicate that it /// is the parent of a group, or point to another node to indicate /// that it is a member of the same group as that node. std::vector GroupNodes; - - /// GroupNodeIndices - For each register, the index of the GroupNode + + /// For each register, the index of the GroupNode /// currently representing the group that the register belongs to. /// Register 0 is always represented by the 0 group, a group /// composed of registers that are not eligible for anti-aliasing. - unsigned GroupNodeIndices[TargetRegisterInfo::FirstVirtualRegister]; - - /// RegRefs - Map registers to all their references within a live range. + std::vector GroupNodeIndices; + + /// Map registers to all their references within a live range. std::multimap RegRefs; - - /// KillIndices - The index of the most recent kill (proceding bottom-up), + + /// The index of the most recent kill (proceding bottom-up), /// or ~0u if the register is not live. - unsigned KillIndices[TargetRegisterInfo::FirstVirtualRegister]; - - /// DefIndices - The index of the most recent complete def (proceding bottom + std::vector KillIndices; + + /// The index of the most recent complete def (proceding bottom /// up), or ~0u if the register is live. - unsigned DefIndices[TargetRegisterInfo::FirstVirtualRegister]; + std::vector DefIndices; public: - AggressiveAntiDepState(MachineBasicBlock *BB); - - /// GetKillIndices - Return the kill indices. - unsigned *GetKillIndices() { return KillIndices; } + AggressiveAntiDepState(const unsigned TargetRegs, MachineBasicBlock *BB); + + /// Return the kill indices. + std::vector &GetKillIndices() { return KillIndices; } - /// GetDefIndices - Return the define indices. - unsigned *GetDefIndices() { return DefIndices; } + /// Return the define indices. + std::vector &GetDefIndices() { return DefIndices; } - /// GetRegRefs - Return the RegRefs map. + /// Return the RegRefs map. std::multimap& GetRegRefs() { return RegRefs; } - // GetGroup - Get the group for a register. The returned value is + // Get the group for a register. The returned value is // the index of the GroupNode representing the group. unsigned GetGroup(unsigned Reg); - - // GetGroupRegs - Return a vector of the registers belonging to a - // group. - void GetGroupRegs(unsigned Group, std::vector &Regs); - - // UnionGroups - Union Reg1's and Reg2's groups to form a new - // group. Return the index of the GroupNode representing the - // group. + + // Return a vector of the registers belonging to a group. + // If RegRefs is non-NULL then only included referenced registers. + void GetGroupRegs( + unsigned Group, + std::vector &Regs, + std::multimap *RegRefs); + + // Union Reg1's and Reg2's groups to form a new group. + // Return the index of the GroupNode representing the group. unsigned UnionGroups(unsigned Reg1, unsigned Reg2); - // LeaveGroup - Remove a register from its current group and place + // Remove a register from its current group and place // it alone in its own group. Return the index of the GroupNode // representing the registers new group. unsigned LeaveGroup(unsigned Reg); - /// IsLive - Return true if Reg is live + /// Return true if Reg is live. bool IsLive(unsigned Reg); }; - /// Class AggressiveAntiDepBreaker class AggressiveAntiDepBreaker : public AntiDepBreaker { MachineFunction& MF; MachineRegisterInfo &MRI; + const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; + const RegisterClassInfo &RegClassInfo; - /// AllocatableSet - The set of allocatable registers. - /// We'll be ignoring anti-dependencies on non-allocatable registers, - /// because they may not be safe to break. - const BitVector AllocatableSet; + /// The set of registers that should only be + /// renamed if they are on the critical path. + BitVector CriticalPathSet; - /// State - The state used to identify and rename anti-dependence - /// registers. + /// The state used to identify and rename anti-dependence registers. AggressiveAntiDepState *State; - /// SavedState - The state for the start of an anti-dep - /// region. Used to restore the state at the beginning of each - /// pass - AggressiveAntiDepState *SavedState; - public: - AggressiveAntiDepBreaker(MachineFunction& MFi); + AggressiveAntiDepBreaker(MachineFunction& MFi, + const RegisterClassInfo &RCI, + TargetSubtargetInfo::RegClassVector& CriticalPathRCs); ~AggressiveAntiDepBreaker(); - - /// GetMaxTrials - As anti-dependencies are broken, additional - /// dependencies may be exposed, so multiple passes are required. - unsigned GetMaxTrials(); - - /// NeedCandidates - Candidates required. - bool NeedCandidates() { return true; } - /// Start - Initialize anti-dep breaking for a new basic block. - void StartBlock(MachineBasicBlock *BB); + /// Initialize anti-dep breaking for a new basic block. + void StartBlock(MachineBasicBlock *BB) override; - /// BreakAntiDependencies - Identifiy anti-dependencies along the critical path + /// Identifiy anti-dependencies along the critical path /// of the ScheduleDAG and break them by renaming registers. /// - unsigned BreakAntiDependencies(std::vector& SUnits, - CandidateMap& Candidates, - MachineBasicBlock::iterator& Begin, - MachineBasicBlock::iterator& End, - unsigned InsertPosIndex); + unsigned BreakAntiDependencies(const std::vector& SUnits, + MachineBasicBlock::iterator Begin, + MachineBasicBlock::iterator End, + unsigned InsertPosIndex, + DbgValueVector &DbgValues) override; - /// Observe - Update liveness information to account for the current + /// Update liveness information to account for the current /// instruction, which will not be scheduled. /// - void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex); + void Observe(MachineInstr *MI, unsigned Count, + unsigned InsertPosIndex) override; - /// Finish - Finish anti-dep breaking for a basic block. - void FinishBlock(); + /// Finish anti-dep breaking for a basic block. + void FinishBlock() override; private: - typedef std::map RenameOrderType; + /// Keep track of a position in the allocation order for each regclass. + typedef std::map RenameOrderType; - /// IsImplicitDefUse - Return true if MO represents a register + /// Return true if MO represents a register /// that is both implicitly used and defined in MI bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO); - - /// GetPassthruRegs - If MI implicitly def/uses a register, then + + /// If MI implicitly def/uses a register, then /// return that register and all subregisters. void GetPassthruRegs(MachineInstr *MI, std::set& PassthruRegs); - void HandleLastUse(unsigned Reg, unsigned KillIdx, const char *tag); + void HandleLastUse(unsigned Reg, unsigned KillIdx, const char *tag, + const char *header = nullptr, + const char *footer = nullptr); + void PrescanInstruction(MachineInstr *MI, unsigned Count, std::set& PassthruRegs); void ScanInstruction(MachineInstr *MI, unsigned Count);