X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FMC%2FMCTargetAsmParser.h;h=36db3914f01746c67672032e74c819efe00ef7fa;hb=c1c9bc1df7a69ac896b5ccbd6f6b91ef91716839;hp=4e3fd0d3a9ec3396919671f499a26dbb2a1f79ea;hpb=19cb7f491fbc7cb5d0bbd10e201f9d5093e6d4e5;p=oota-llvm.git diff --git a/include/llvm/MC/MCTargetAsmParser.h b/include/llvm/MC/MCTargetAsmParser.h index 4e3fd0d3a9e..36db3914f01 100644 --- a/include/llvm/MC/MCTargetAsmParser.h +++ b/include/llvm/MC/MCTargetAsmParser.h @@ -7,25 +7,80 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_MC_TARGETPARSER_H -#define LLVM_MC_TARGETPARSER_H +#ifndef LLVM_MC_MCTARGETASMPARSER_H +#define LLVM_MC_MCTARGETASMPARSER_H +#include "llvm/MC/MCExpr.h" #include "llvm/MC/MCParser/MCAsmParserExtension.h" +#include "llvm/MC/MCTargetOptions.h" +#include namespace llvm { -class MCStreamer; -class StringRef; -class SMLoc; class AsmToken; -class MCParsedAsmOperand; class MCInst; +class MCParsedAsmOperand; +class MCStreamer; +class SMLoc; +class StringRef; template class SmallVectorImpl; +typedef SmallVectorImpl> OperandVector; + +enum AsmRewriteKind { + AOK_Delete = 0, // Rewrite should be ignored. + AOK_Align, // Rewrite align as .align. + AOK_DotOperator, // Rewrite a dot operator expression as an immediate. + // E.g., [eax].foo.bar -> [eax].8 + AOK_Emit, // Rewrite _emit as .byte. + AOK_Imm, // Rewrite as $$N. + AOK_ImmPrefix, // Add $$ before a parsed Imm. + AOK_Input, // Rewrite in terms of $N. + AOK_Output, // Rewrite in terms of $N. + AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr). + AOK_Label, // Rewrite local labels. + AOK_Skip // Skip emission (e.g., offset/type operators). +}; + +const char AsmRewritePrecedence [] = { + 0, // AOK_Delete + 2, // AOK_Align + 2, // AOK_DotOperator + 2, // AOK_Emit + 4, // AOK_Imm + 4, // AOK_ImmPrefix + 3, // AOK_Input + 3, // AOK_Output + 5, // AOK_SizeDirective + 1, // AOK_Label + 2 // AOK_Skip +}; + +struct AsmRewrite { + AsmRewriteKind Kind; + SMLoc Loc; + unsigned Len; + unsigned Val; + StringRef Label; +public: + AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0) + : Kind(kind), Loc(loc), Len(len), Val(val) {} + AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label) + : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {} +}; + +struct ParseInstructionInfo { + + SmallVectorImpl *AsmRewrites; + + ParseInstructionInfo() : AsmRewrites(nullptr) {} + ParseInstructionInfo(SmallVectorImpl *rewrites) + : AsmRewrites(rewrites) {} +}; + /// MCTargetAsmParser - Generic interface to target specific assembly parsers. class MCTargetAsmParser : public MCAsmParserExtension { public: enum MatchResultTy { - Match_ConversionFail, Match_InvalidOperand, Match_MissingFeature, Match_MnemonicFail, @@ -34,23 +89,45 @@ public: }; private: - MCTargetAsmParser(const MCTargetAsmParser &); // DO NOT IMPLEMENT - void operator=(const MCTargetAsmParser &); // DO NOT IMPLEMENT + MCTargetAsmParser(const MCTargetAsmParser &) = delete; + void operator=(const MCTargetAsmParser &) = delete; protected: // Can only create subclasses. MCTargetAsmParser(); /// AvailableFeatures - The current set of available features. - unsigned AvailableFeatures; + uint64_t AvailableFeatures; + + /// ParsingInlineAsm - Are we parsing ms-style inline assembly? + bool ParsingInlineAsm; + + /// SemaCallback - The Sema callback implementation. Must be set when parsing + /// ms-style inline assembly. + MCAsmParserSemaCallback *SemaCallback; + + /// Set of options which affects instrumentation of inline assembly. + MCTargetOptions MCOptions; public: - virtual ~MCTargetAsmParser(); + ~MCTargetAsmParser() override; + + uint64_t getAvailableFeatures() const { return AvailableFeatures; } + void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; } + + bool isParsingInlineAsm () { return ParsingInlineAsm; } + void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; } - unsigned getAvailableFeatures() const { return AvailableFeatures; } - void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; } + MCTargetOptions getTargetOptions() const { return MCOptions; } + + void setSemaCallback(MCAsmParserSemaCallback *Callback) { + SemaCallback = Callback; + } virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) = 0; + /// Sets frame register corresponding to the current MachineFunction. + virtual void SetFrameRegister(unsigned RegNo) {} + /// ParseInstruction - Parse one assembly instruction. /// /// The parser is positioned following the instruction name. The target @@ -64,8 +141,8 @@ public: /// \param Operands [out] - The list of parsed operands, this returns /// ownership of them to the caller. /// \return True on failure. - virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc, - SmallVectorImpl &Operands) = 0; + virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, + SMLoc NameLoc, OperandVector &Operands) = 0; /// ParseDirective - Parse a target specific assembler directive /// @@ -79,16 +156,32 @@ public: /// \param DirectiveID - the identifier token of the directive. virtual bool ParseDirective(AsmToken DirectiveID) = 0; + /// mnemonicIsValid - This returns true if this is a valid mnemonic and false + /// otherwise. + virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0; + /// MatchAndEmitInstruction - Recognize a series of operands of a parsed /// instruction as an actual MCInst and emit it to the specified MCStreamer. /// This returns false on success and returns true on failure to match. /// /// On failure, the target parser is responsible for emitting a diagnostic /// explaining the match failure. - virtual bool - MatchAndEmitInstruction(SMLoc IDLoc, - SmallVectorImpl &Operands, - MCStreamer &Out) = 0; + virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, + OperandVector &Operands, MCStreamer &Out, + uint64_t &ErrorInfo, + bool MatchingInlineAsm) = 0; + + /// Allows targets to let registers opt out of clobber lists. + virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; } + + /// Allow a target to add special case operand matching for things that + /// tblgen doesn't/can't handle effectively. For example, literal + /// immediates on ARM. TableGen expects a token operand, but the parser + /// will recognize them as immediates. + virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, + unsigned Kind) { + return Match_InvalidOperand; + } /// checkTargetMatchPredicate - Validate the instruction match against /// any complex target predicates not expressible via match classes. @@ -96,6 +189,16 @@ public: return Match_Success; } + virtual void convertToMapAndConstraints(unsigned Kind, + const OperandVector &Operands) = 0; + + virtual const MCExpr *applyModifierToExpr(const MCExpr *E, + MCSymbolRefExpr::VariantKind, + MCContext &Ctx) { + return nullptr; + } + + virtual void onLabelParsed(MCSymbol *Symbol) { }; }; } // End llvm namespace