X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FCallingConvLower.h;h=3afe3095d4f624c6206aa57eda2011d651f40f37;hb=b77ec7d26405125fa5685370af5f17fcc9edbecd;hp=a8f2d1eca9c0bb96a8054f3768839c3d4f70ef85;hpb=7ed47a13356daed2a34cd2209a31f92552e3bdd8;p=oota-llvm.git diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h index a8f2d1eca9c..3afe3095d4f 100644 --- a/include/llvm/CodeGen/CallingConvLower.h +++ b/include/llvm/CodeGen/CallingConvLower.h @@ -16,13 +16,15 @@ #define LLVM_CODEGEN_CALLINGCONVLOWER_H #include "llvm/ADT/SmallVector.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/Target/TargetCallingConv.h" +#include "llvm/CallingConv.h" namespace llvm { - class MRegisterInfo; + class TargetRegisterInfo; class TargetMachine; class CCState; - class SDNode; /// CCValAssign - Represent assignment of one arg/retval to a location. class CCValAssign { @@ -31,99 +33,156 @@ public: Full, // The value fills the full location. SExt, // The value is sign extended in the location. ZExt, // The value is zero extended in the location. - AExt // The value is extended with undefined upper bits. + AExt, // The value is extended with undefined upper bits. + BCvt, // The value is bit-converted in the location. + VExt, // The value is vector-widened in the location. + // FIXME: Not implemented yet. Code that uses AExt to mean + // vector-widen should be fixed to use VExt instead. + Indirect // The location contains pointer to the value. // TODO: a subset of the value is in the location. }; private: /// ValNo - This is the value number begin assigned (e.g. an argument number). unsigned ValNo; - + /// Loc is either a stack offset or a register number. unsigned Loc; - + /// isMem - True if this is a memory loc, false if it is a register loc. bool isMem : 1; - + + /// isCustom - True if this arg/retval requires special handling. + bool isCustom : 1; + /// Information about how the value is assigned. - LocInfo HTP : 7; - + LocInfo HTP : 6; + /// ValVT - The type of the value being assigned. - MVT::ValueType ValVT; + MVT ValVT; /// LocVT - The type of the location being assigned to. - MVT::ValueType LocVT; + MVT LocVT; public: - - static CCValAssign getReg(unsigned ValNo, MVT::ValueType ValVT, - unsigned RegNo, MVT::ValueType LocVT, + + static CCValAssign getReg(unsigned ValNo, MVT ValVT, + unsigned RegNo, MVT LocVT, LocInfo HTP) { CCValAssign Ret; Ret.ValNo = ValNo; Ret.Loc = RegNo; Ret.isMem = false; + Ret.isCustom = false; Ret.HTP = HTP; Ret.ValVT = ValVT; Ret.LocVT = LocVT; return Ret; } - static CCValAssign getMem(unsigned ValNo, MVT::ValueType ValVT, - unsigned Offset, MVT::ValueType LocVT, + + static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, + unsigned RegNo, MVT LocVT, + LocInfo HTP) { + CCValAssign Ret; + Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP); + Ret.isCustom = true; + return Ret; + } + + static CCValAssign getMem(unsigned ValNo, MVT ValVT, + unsigned Offset, MVT LocVT, LocInfo HTP) { CCValAssign Ret; Ret.ValNo = ValNo; Ret.Loc = Offset; Ret.isMem = true; + Ret.isCustom = false; Ret.HTP = HTP; Ret.ValVT = ValVT; Ret.LocVT = LocVT; return Ret; } - + + static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, + unsigned Offset, MVT LocVT, + LocInfo HTP) { + CCValAssign Ret; + Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP); + Ret.isCustom = true; + return Ret; + } + unsigned getValNo() const { return ValNo; } - MVT::ValueType getValVT() const { return ValVT; } + MVT getValVT() const { return ValVT; } bool isRegLoc() const { return !isMem; } bool isMemLoc() const { return isMem; } - + + bool needsCustom() const { return isCustom; } + unsigned getLocReg() const { assert(isRegLoc()); return Loc; } unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; } - MVT::ValueType getLocVT() const { return LocVT; } - + MVT getLocVT() const { return LocVT; } + LocInfo getLocInfo() const { return HTP; } -}; + bool isExtInLoc() const { + return (HTP == AExt || HTP == SExt || HTP == ZExt); + } +}; /// CCAssignFn - This function assigns a location for Val, updating State to -/// reflect the change. -typedef bool CCAssignFn(unsigned ValNo, MVT::ValueType ValVT, - MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo, - unsigned ArgFlags, CCState &State); +/// reflect the change. It returns 'true' if it failed to handle Val. +typedef bool CCAssignFn(unsigned ValNo, MVT ValVT, + MVT LocVT, CCValAssign::LocInfo LocInfo, + ISD::ArgFlagsTy ArgFlags, CCState &State); + +/// CCCustomFn - This function assigns a location for Val, possibly updating +/// all args to reflect changes and indicates if it handled it. It must set +/// isCustom if it handles the arg and returns true. +typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT, + MVT &LocVT, CCValAssign::LocInfo &LocInfo, + ISD::ArgFlagsTy &ArgFlags, CCState &State); + +/// ParmContext - This enum tracks whether calling convention lowering is in +/// the context of prologue or call generation. Not all backends make use of +/// this information. +typedef enum { Unknown, Prologue, Call } ParmContext; - /// CCState - This class holds information needed while lowering arguments and /// return values. It captures which registers are already assigned and which /// stack slots are used. It provides accessors to allocate these values. class CCState { - unsigned CallingConv; +private: + CallingConv::ID CallingConv; bool IsVarArg; + MachineFunction &MF; const TargetMachine &TM; - const MRegisterInfo &MRI; + const TargetRegisterInfo &TRI; SmallVector &Locs; - + LLVMContext &Context; + unsigned StackOffset; SmallVector UsedRegs; + unsigned FirstByValReg; + bool FirstByValRegValid; + +protected: + ParmContext CallOrPrologue; + public: - CCState(unsigned CC, bool isVarArg, const TargetMachine &TM, - SmallVector &locs); - + CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, + const TargetMachine &TM, SmallVector &locs, + LLVMContext &C); + void addLoc(const CCValAssign &V) { Locs.push_back(V); } - + + LLVMContext &getContext() const { return Context; } const TargetMachine &getTarget() const { return TM; } - unsigned getCallingConv() const { return CallingConv; } + MachineFunction &getMachineFunction() const { return MF; } + CallingConv::ID getCallingConv() const { return CallingConv; } bool isVarArg() const { return IsVarArg; } - + unsigned getNextStackOffset() const { return StackOffset; } /// isAllocated - Return true if the specified register (or an alias) is @@ -131,33 +190,52 @@ public: bool isAllocated(unsigned Reg) const { return UsedRegs[Reg/32] & (1 << (Reg&31)); } - - /// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node, + + /// AnalyzeFormalArguments - Analyze an array of argument values, /// incorporating info about the formals into this state. - void AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn); - - /// AnalyzeReturn - Analyze the returned values of an ISD::RET node, + void AnalyzeFormalArguments(const SmallVectorImpl &Ins, + CCAssignFn Fn); + + /// AnalyzeReturn - Analyze the returned values of a return, /// incorporating info about the result values into this state. - void AnalyzeReturn(SDNode *TheRet, CCAssignFn Fn); - - /// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info - /// about the passed values into this state. - void AnalyzeCallOperands(SDNode *TheCall, CCAssignFn Fn); + void AnalyzeReturn(const SmallVectorImpl &Outs, + CCAssignFn Fn); + + /// CheckReturn - Analyze the return values of a function, returning + /// true if the return can be performed without sret-demotion, and + /// false otherwise. + bool CheckReturn(const SmallVectorImpl &ArgsFlags, + CCAssignFn Fn); + + /// AnalyzeCallOperands - Analyze the outgoing arguments to a call, + /// incorporating info about the passed values into this state. + void AnalyzeCallOperands(const SmallVectorImpl &Outs, + CCAssignFn Fn); + + /// AnalyzeCallOperands - Same as above except it takes vectors of types + /// and argument flags. + void AnalyzeCallOperands(SmallVectorImpl &ArgVTs, + SmallVectorImpl &Flags, + CCAssignFn Fn); - /// AnalyzeCallResult - Analyze the return values of an ISD::CALL node, + /// AnalyzeCallResult - Analyze the return values of a call, /// incorporating info about the passed values into this state. - void AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn); - + void AnalyzeCallResult(const SmallVectorImpl &Ins, + CCAssignFn Fn); + + /// AnalyzeCallResult - Same as above except it's specialized for calls which + /// produce a single value. + void AnalyzeCallResult(MVT VT, CCAssignFn Fn); /// getFirstUnallocated - Return the first unallocated register in the set, or /// NumRegs if they are all allocated. - unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const { + unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const { for (unsigned i = 0; i != NumRegs; ++i) if (!isAllocated(Regs[i])) return i; return NumRegs; } - + /// AllocateReg - Attempt to allocate one register. If it is not available, /// return zero. Otherwise, return the register, marking it and any aliases /// as allocated. @@ -166,21 +244,43 @@ public: MarkAllocated(Reg); return Reg; } - + + /// Version of AllocateReg with extra register to be shadowed. + unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) { + if (isAllocated(Reg)) return 0; + MarkAllocated(Reg); + MarkAllocated(ShadowReg); + return Reg; + } + /// AllocateReg - Attempt to allocate one of the specified registers. If none /// are available, return zero. Otherwise, return the first one available, /// marking it and any aliases as allocated. - unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) { + unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) { unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs); if (FirstUnalloc == NumRegs) return 0; // Didn't find the reg. - + // Mark the register and any aliases as allocated. unsigned Reg = Regs[FirstUnalloc]; MarkAllocated(Reg); return Reg; } - + + /// Version of AllocateReg with list of registers to be shadowed. + unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs, + unsigned NumRegs) { + unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs); + if (FirstUnalloc == NumRegs) + return 0; // Didn't find the reg. + + // Mark the register and any aliases as allocated. + unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc]; + MarkAllocated(Reg); + MarkAllocated(ShadowReg); + return Reg; + } + /// AllocateStack - Allocate a chunk of stack space with the specified size /// and alignment. unsigned AllocateStack(unsigned Size, unsigned Align) { @@ -191,9 +291,28 @@ public: return Result; } - void HandleStruct(unsigned ValNo, MVT::ValueType ValVT, - MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo, - unsigned ArgFlags); + /// Version of AllocateStack with extra register to be shadowed. + unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) { + MarkAllocated(ShadowReg); + return AllocateStack(Size, Align); + } + + // HandleByVal - Allocate a stack slot large enough to pass an argument by + // value. The size and alignment information of the argument is encoded in its + // parameter attribute. + void HandleByVal(unsigned ValNo, MVT ValVT, + MVT LocVT, CCValAssign::LocInfo LocInfo, + int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags); + + // First GPR that carries part of a byval aggregate that's split + // between registers and memory. + unsigned getFirstByValReg() const { return FirstByValRegValid ? FirstByValReg : 0; } + void setFirstByValReg(unsigned r) { FirstByValReg = r; FirstByValRegValid = true; } + void clearFirstByValReg() { FirstByValReg = 0; FirstByValRegValid = false; } + bool isFirstByValRegValid() const { return FirstByValRegValid; } + + ParmContext getCallOrPrologue() const { return CallOrPrologue; } + private: /// MarkAllocated - Mark a register and all of its aliases as allocated. void MarkAllocated(unsigned Reg);