X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=drivers%2Fspi%2Frk29_spim.c;h=e8a02cbe28a79574fe702ce736ecdddc9698e790;hb=6f1b688f7971145091170b96f6eb4990dad7d5c9;hp=8fca6a8042976e6d7ff3f62ec67df05012401ee4;hpb=fd3316fde02fdeab8b36fcd60cad6a4a840421bc;p=firefly-linux-kernel-4.4.55.git

diff --git a/drivers/spi/rk29_spim.c b/drivers/spi/rk29_spim.c
index 8fca6a804297..e8a02cbe28a7 100755
--- a/drivers/spi/rk29_spim.c
+++ b/drivers/spi/rk29_spim.c
@@ -69,10 +69,11 @@ struct chip_data {
 	u8 cs;			/* chip select pin */
 	u8 n_bytes;		/* current is a 1/2/4 byte op */
 	u8 tmode;		/* TR/TO/RO/EEPROM */
+	u8 mode;		/* ??? */
 	u8 type;		/* SPI/SSP/MicroWire */
 
 	u8 poll_mode;		/* 1 means use poll mode */
-
+	u8 slave_enable;
 	u32 dma_width;
 	u32 rx_threshold;
 	u32 tx_threshold;
@@ -141,6 +142,7 @@ static void printk_transfer_data(unsigned char *buf, int len)
 }
 #endif
 
+#if 0
 static void spi_dump_regs(struct rk29xx_spi *dws) {
 	DBG("MRST SPI0 registers:\n");
 	DBG("=================================\n");
@@ -162,6 +164,7 @@ static void spi_dump_regs(struct rk29xx_spi *dws) {
 	DBG("=================================\n");
 
 }
+#endif
 
 #ifdef CONFIG_DEBUG_FS
 static int spi_show_regs_open(struct inode *inode, struct file *file)
@@ -267,7 +270,12 @@ static void transfer_complete(struct rk29xx_spi *dws);
 static void wait_till_not_busy(struct rk29xx_spi *dws)
 {
 	unsigned long end = jiffies + 1 + usecs_to_jiffies(1000);
-
+	//if spi was slave, it is SR_BUSY always.  
+	if(dws->cur_chip) {
+		if(dws->cur_chip->slave_enable == 1)
+			return;
+	}
+	
 	while (time_before(jiffies, end)) {
 		if (!(rk29xx_readw(dws, SPIM_SR) & SR_BUSY))
 			return;
@@ -307,6 +315,8 @@ static void spi_cs_control(struct rk29xx_spi *dws, u32 cs, u8 flag)
 		rk29xx_writel(dws, SPIM_SER, 0);
 	return;
 	#else
+	
+	#error "Warning: not support"
 	struct rk29xx_spi_platform_data *pdata = dws->master->dev.platform_data;
 	struct spi_cs_gpio *cs_gpios = pdata->chipselect_gpios;
 
@@ -608,6 +618,7 @@ static void giveback(struct rk29xx_spi *dws)
 	dws->prev_chip = dws->cur_chip;
 	dws->cur_chip = NULL;
 	dws->dma_mapped = 0;
+
 	
 	/*it is important to close intterrupt*/
 	spi_mask_intr(dws, 0xff);
@@ -897,7 +908,10 @@ static void pump_transfers(unsigned long data)
 
 		cr0 &= ~(0x3 << SPI_MODE_OFFSET);		
 		cr0 &= ~(0x3 << SPI_TMOD_OFFSET);
+		cr0 &= ~(0x1 << SPI_OPMOD_OFFSET);	
+		cr0 |= (spi->mode << SPI_MODE_OFFSET);
 		cr0 |= (chip->tmode << SPI_TMOD_OFFSET);
+		cr0 |= ((chip->slave_enable & 1) << SPI_OPMOD_OFFSET);
 	} 
 
 	/*
@@ -937,10 +951,11 @@ static void pump_transfers(unsigned long data)
 		spi_chip_sel(dws, spi->chip_select);
 
         rk29xx_writew(dws, SPIM_CTRLR1, dws->len-1);
-		spi_enable_chip(dws, 1);
-
+		
 		if (txint_level)
 			rk29xx_writew(dws, SPIM_TXFTLR, txint_level);
+		spi_enable_chip(dws, 1);	
+			
 		if (rxint_level)
 			rk29xx_writew(dws, SPIM_RXFTLR, rxint_level);
 		/* Set the interrupt mask, for poll mode just diable all int */
@@ -1106,7 +1121,10 @@ static void dma_transfer(struct rk29xx_spi *dws)
 
 		cr0 &= ~(0x3 << SPI_MODE_OFFSET);
 		cr0 &= ~(0x3 << SPI_TMOD_OFFSET);
+		cr0 &= ~(0x1 << SPI_OPMOD_OFFSET);		
+		cr0 |= (spi->mode << SPI_MODE_OFFSET);
 		cr0 |= (chip->tmode << SPI_TMOD_OFFSET);
+		cr0 |= ((chip->slave_enable & 1) << SPI_OPMOD_OFFSET);
 	}
 
 	/*
@@ -1527,6 +1545,8 @@ static int rk29xx_pump_transfers(struct rk29xx_spi *dws, int mode)
 			chip->tmode = SPI_TMOD_TO;
 
 		cr0 &= ~(0x3 << SPI_MODE_OFFSET);
+		cr0 &= ~(0x3 << SPI_TMOD_OFFSET);
+		cr0 |= (spi->mode << SPI_MODE_OFFSET);
 		cr0 |= (chip->tmode << SPI_TMOD_OFFSET);
 	}
 	
@@ -1721,7 +1741,7 @@ static int rk29xx_spi_setup(struct spi_device *spi)
 
 		chip->poll_mode = chip_info->poll_mode;
 		chip->type = chip_info->type;
-
+		chip->slave_enable = chip_info->slave_enable;
 		chip->rx_threshold = 0;
 		chip->tx_threshold = 0;