X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=drivers%2Fpci%2Fhost%2Fpcie-rockchip.c;fp=drivers%2Fpci%2Fhost%2Fpcie-rockchip.c;h=fd8620f92cae9586d3f28b96bcce19826188665b;hb=c2b181bebf793b22009f97b17111b3099edca5b2;hp=f204f8b60b00f9c63d50821a143dd09b9dd2f3e9;hpb=01ab7a656c4e690b261f057c5b6fb7298ec09cc2;p=firefly-linux-kernel-4.4.55.git

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index f204f8b60b00..fd8620f92cae 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -595,8 +595,8 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 
 	/* Check the final link width from negotiated lane counter from MGMT */
 	status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL);
-	status =  0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
-			  PCIE_CORE_PL_CONF_LANE_MASK);
+	status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
+			  PCIE_CORE_PL_CONF_LANE_SHIFT);
 	dev_dbg(dev, "current link width is x%d\n", status);
 
 	rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,