X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=docs%2FReleaseNotes.rst;h=73831f545390e2c2665a9faf0971367dacfbf266;hb=2507c58ca21ee01c359cd5ddf2fe84eea16366ee;hp=bbf2dd0f39f82d77a87caa2fb7ed1446507bac7f;hpb=e293d6c8d134ad352bb69defee17c5c902476933;p=oota-llvm.git diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst index bbf2dd0f39f..73831f54539 100644 --- a/docs/ReleaseNotes.rst +++ b/docs/ReleaseNotes.rst @@ -89,6 +89,30 @@ Non-comprehensive list of changes in this release the node ``N`` is guaranteed not to be the last in the list, it is safe to call ``&*++N->getIterator()`` directly. +* The `Kaleidoscope tutorials `_ have been updated to use + the ORC JIT APIs. + +* ORC now has a basic set of C bindings. + +* Optional support for linking clang and the LLVM tools with a single libLLVM + shared library. To enable this, pass ``-DLLVM_LINK_LLVM_DYLIB=ON`` to CMake. + See `Building LLVM with CMake`_ for more details. + +* The optimization to move the prologue and epilogue of functions in colder + code path (shrink-wrapping) is now enabled by default. + +* A new target-independent gcc-compatible emulated Thread Local Storage mode + is added. When ``-femultated-tls`` flag is used, all accesses to TLS + variables are converted to calls to ``__emutls_get_address`` in the runtime + library. + +* MSVC compatible exception handling has been completely overhauled. New + instructions have been introduced to facilitate this: + `New exception handling instructions `_. + While we have done our best to test this feature thoroughly, it would + not be completely surprising if there were a few lingering issues that + early adopters might bump into. + .. NOTE For small 1-3 sentence descriptions, just add an entry at the end of this list. If your description won't fit comfortably in one bullet @@ -108,10 +132,35 @@ Non-comprehensive list of changes in this release Makes programs 10x faster by doing Special New Thing. -Changes to the ARM Backend --------------------------- - During this release ... +Changes to the ARM Backends +--------------------------- + +During this release the AArch64 target has: + +* Added support for more sanitizers (MSAN, TSAN) and made them compatible with + all VMA kernel configurations (currently tested on 39 and 42 bits). +* Gained initial LLD support in the new ELF back-end +* Extended the Load/Store optimiser and cleaned up some of the bad decisions + made earlier. +* Expanded LLDB support, including watchpoints, native building, Renderscript, + LLDB-server, debugging 32-bit applications. +* Added support for the ``Exynos M1`` chip. + +During this release the ARM target has: + +* Gained massive performance improvements on embedded benchmarks due to finally + running the stride vectorizer in full form, incrementing the performance gains + that we already had in the previous releases with limited stride vectorization. +* Expanded LLDB support, including watchpoints, unwind tables +* Extended the Load/Store optimiser and cleaned up some of the bad decisions + made earlier. +* Simplified code generation for global variable addresses in ELF, resulting in + a significant (4% in Chromium) reduction in code size. +* Gained some additional code size improvements, though there's still a long road + ahead, especially for older cores. +* Added some EABI floating point comparison functions to Compiler-RT +* Added support for Windows+GNU triple, +features in -mcpu/-march options. Changes to the MIPS Target @@ -188,6 +237,27 @@ Changes to the X86 Target * TLS is enabled for Cygwin as emutls. +* Smaller code for materializing 32-bit 1 and -1 constants at ``-Os``. + +* More efficient code for wide integer compares. (E.g. 64-bit compares + on 32-bit targets.) + +* Tail call support for ``thiscall``, ``stdcall``, ``vectorcall``, and + ``fastcall`` functions. + +Changes to the Hexagon Target +----------------------------- + +In addition to general code size and performance improvements, Hexagon target +now has basic support for Hexagon V60 architecture and Hexagon Vector +Extensions (HVX). + +Changes to the AVR Target +------------------------- + +Slightly less than half of the AVR backend has been merged in at this point. It is still +missing a number large parts which cause it to be unusable, but is well on the +road to being completely merged and workable. Changes to the OCaml bindings -----------------------------