LLVM identifiers come in two basic types: global and local. Global identifiers (functions, global variables) begin with the @ character. Local identifiers (register names, types) begin with the % character. Additionally, - there are three different formats for identifiers, for different purposes: + there are three different formats for identifiers, for different purposes:
_imp__ and the function or variable name.
+ formed by combining __imp_ and the function or variable name.
_imp__ and the function or variable
+ name is formed by combining __imp_ and the function or variable
name.
For example, since the ".LC0" +
For example, since the ".LC0" variable is defined to be internal, if another module defined a ".LC0" variable and was linked with this one, one of the two would be renamed, preventing a collision. Since "main" and "puts" are external (i.e., lacking any linkage declarations), they are accessible outside of the current module.
It is illegal for a function declaration -to have any linkage type other than "externally visible", dllimport, +to have any linkage type other than "externally visible", dllimport or extern_weak.
-Aliases can have only external, internal and weak -linkages. +
Aliases can have only external, internal, weak +or weak_odr linkages.
@@ -677,6 +723,40 @@ All Global Variables and Functions have one of the following visibility styles: + +LLVM IR allows you to specify name aliases for certain types. This can make +it easier to read the IR and make the IR more condensed (particularly when +recursive types are involved). An example of a name specification is: +
+ +
+%mytype = type { %mytype*, i32 }
+
+You may give a name to any type except "void". Type name aliases may be used anywhere a type is +expected with the syntax "%mytype".
+ +Note that type names are aliases for the structural type that they indicate, +and that you can therefore specify multiple names for the same type. This often +leads to confusing behavior when dumping out a .ll file. Since LLVM IR uses +structural typing, the name is not part of the type. When printing out LLVM IR, +the printer will pick one name to render all types of a particular +shape. This means that if you have code where two different source types end up +having the same LLVM type, that the dumper will sometimes print the "wrong" or +unexpected type. This is an important design point and isn't going to +change.
+ +-@G = constant float 1.0 addrspace(5), section "foo", align 4 +@G = addrspace(5) constant float 1.0, section "foo", align 4
-declare i32 @printf(i8* noalias , ...) -declare i32 @atoi(i8 zeroext*) +declare i32 @printf(i8* noalias nocapture, ...) +declare i32 @atoi(i8 zeroext) +declare signext i8 @returns_signed_char()
Currently, only the following parameter attributes are defined:
When constructing the data layout for a given target, LLVM starts with a default set of specifications which are then (possibly) overriden by the @@ -1045,9 +1204,10 @@ are given in this list:
When LLVM is determining the alignment for a given type, it uses the -following rules: +following rules:
The metadata type represents embedded metadata. The only derived type that +may contain metadata is metadata* or a function type that returns or +takes metadata typed parameters, but not pointer to metadata types.
+ ++ metadata ++
| i1 | -a single-bit integer. | -
| i32 | -a 32-bit integer. | -
| i1942652 | -a really big integer of over 1 million bits. | +
| i1 | +a single-bit integer. | +
| i32 | +a 32-bit integer. | +
| i1942652 | +a really big integer of over 1 million bits. |
Note that the code generator does not yet support large integer types +to be used as function return types. The specific limit on how large a +return type the code generator can currently handle is target-dependent; +currently it's often 64 bits for 32-bit targets and 128 bits for 64-bit +targets.
+ @@ -1296,6 +1482,11 @@ As a special case, however, zero length arrays are recognized to be variable length. This allows implementation of 'pascal style arrays' with the LLVM type "{ i32, [0 x float]}", for example. +Note that the code generator does not yet support large aggregate types +to be used as function return types. The specific limit on how large an +aggregate return type the code generator can currently handle is +target-dependent, and also dependent on the aggregate element types.
+ @@ -1347,8 +1538,8 @@ Variable argument functions can access their arguments with theNote that the code generator does not yet support large aggregate types +to be used as function return types. The specific limit on how large an +aggregate return type the code generator can currently handle is +target-dependent, and also dependent on the aggregate element types.
+ @@ -1423,12 +1620,16 @@ reference to another object, which must live in memory. Pointer types may have an optional address space attribute defining the target-specific numbered address space where the pointed-to object resides. The default address space is zero. + +Note that LLVM does not permit pointers to void (void*) nor does +it permit pointers to labels (label*). Use i8* instead.
+<type> *
| [4x i32]* | +[4 x i32]* | A pointer to array of four i32 values. | Vector of 2 64-bit integer values. |
Note that the code generator does not yet support large vector types +to be used as function return types. The specific limit on how large a +vector return type codegen can currently handle is target-dependent; +currently it's often a few times longer than a hardware vector register.
+ @@ -1514,6 +1721,56 @@ structure type). + + + ++An "up reference" allows you to refer to a lexically enclosing type without +requiring it to have a name. For instance, a structure declaration may contain a +pointer to any of the types it is lexically a member of. Example of up +references (with their equivalent as named type declarations) include:
+ +
+ { \2 * } %x = type { %x* }
+ { \2 }* %y = type { %y }*
+ \1* %z = type %z*
+
+
++An up reference is needed by the asmprinter for printing out cyclic types when +there is no declared name for a type in the cycle. Because the asmprinter does +not want to print out an infinite type string, it needs a syntax to handle +recursive types that have no names (all names are optional in llvm IR). +
+ ++ \<level> ++ +
+The level is the count of the lexical type that is being referred to. +
+ +| \1* | +Self-referential pointer. | +
| { { \3*, i8 }, i32 } | +Recursive structure where the upref refers to the out-most + structure. | +
The one non-intuitive notation for constants is the optional hexadecimal form +
The one non-intuitive notation for constants is the hexadecimal form of floating point constants. For example, the form 'double 0x432ff973cafa8000' is equivalent to (but harder to read than) 'double 4.5e+15'. The only time hexadecimal floating point constants are required (and the only time that they are generated by the disassembler) is when a floating point constant must be emitted but it cannot be represented as a -decimal floating point number. For example, NaN's, infinities, and other +decimal floating point number in a reasonable number of digits. For example, +NaN's, infinities, and other special values are represented in their IEEE hexadecimal format so that assembly and disassembly do not cause any bits to change in the constants.
- +When using the hexadecimal form, constants of types float and double are +represented using the 16-digit form shown above (which matches the IEEE754 +representation for double); float values must, however, be exactly representable +as IEE754 single precision. +Hexadecimal format is always used for long +double, and there are three forms of long double. The 80-bit +format used by x86 is represented as 0xK +followed by 20 hexadecimal digits. +The 128-bit format used by PowerPC (two adjacent doubles) is represented +by 0xM followed by 32 hexadecimal digits. The IEEE 128-bit +format is represented +by 0xL followed by 32 hexadecimal digits; no currently supported +target uses this format. Long doubles will only work if they match +the long double format on your target. All hexadecimal formats are big-endian +(sign bit at the left).
-Aggregate constants arise from aggregation of simple constants -and smaller aggregate constants.
+Complex constants are a (potentially recursive) combination of simple +constants and smaller complex constants.
Embedded metadata provides a way to attach arbitrary data to the +instruction stream without affecting the behaviour of the program. There are +two metadata primitives, strings and nodes. All metadata has the +metadata type and is identified in syntax by a preceding exclamation +point ('!'). +
+ +A metadata string is a string surrounded by double quotes. It can contain +any character by escaping non-printable characters with "\xx" where "xx" is +the two digit hex code. For example: "!"test\00"". +
+ +Metadata nodes are represented with notation similar to structure constants +(a comma separated list of elements, surrounded by braces and preceeded by an +exclamation point). For example: "!{ metadata !"test\00", i32 10}". +
+ +A metadata node will attempt to track changes to the values it holds. In +the event that a value is deleted, it will be replaced with a typeless +"null", such as "metadata !{null, i32 10}".
+ +Optimizations may rely on metadata to provide additional information about +the program that isn't available in the instructions, or that isn't easily +computable. Similarly, the code generator may expect a certain metadata format +to be used to express debugging information.
+TODO: The format of the asm and constraints string still need to be documented here. Constraints on what can be done (e.g. duplication, moving, etc -need to be documented). +need to be documented). This is probably best done by reference to another +document that covers inline asm from a holistic perspective.
@@ -1889,27 +2195,30 @@ the 'invoke' instruction, the 'ret <type> <value> ; Return a value from a non-void function ++ ret <type> <value> ; Return a value from a non-void function ret void ; Return from void function - ret <type> <value>, <type> <value> ; Return two values from a non-void functionOverview:
-The 'ret' instruction is used to return control flow (and a -value) from a function back to the caller.
+The 'ret' instruction is used to return control flow (and +optionally a value) from a function back to the caller.
There are two forms of the 'ret' instruction: one that -returns value(s) and then causes control flow, and one that just causes +returns a value and then causes control flow, and one that just causes control flow to occur.
Arguments:
-The 'ret' instruction may return zero, one or multiple values. -The type of each return value must be a 'first -class' type. Note that a function is not well -formed if there exists a 'ret' instruction inside of the -function that returns values that do not match the return type of the -function.
+The 'ret' instruction optionally accepts a single argument, +the return value. The type of the return value must be a +'first class' type.
+ +A function is not well formed if +it it has a non-void return type and contains a 'ret' +instruction with no return value or a return value with a type that +does not match its type, or if it has a void return type and contains +a 'ret' instruction with a return value.
Semantics:
@@ -1920,17 +2229,24 @@ the instruction after the call. If the caller was an "invoke" instruction, execution continues at the beginning of the "normal" destination block. If the instruction returns a value, that value shall set the call or invoke instruction's -return value. If the instruction returns multiple values then these -values can only be accessed through a 'getresult -' instruction. +return value.Example:
ret i32 5 ; Return an integer value of 5 ret void ; Return from a void function - ret i32 4, i8 2 ; Return two values 4 and 2 + ret { i32, i8 } { i32 4, i8 2 } ; Return a struct of values 4 and 2+ +Note that the code generator does not yet fully support large + return values. The specific sizes that are currently supported are + dependent on the target. For integers, on 32-bit targets the limit + is often 64 bits, and on 64-bit targets the limit is often 128 bits. + For aggregate types, the current limits are dependent on the element + types; for example targets are often limited to 2 total integer + elements and 2 total floating-point elements.
+
Test:@@ -2004,15 +2320,15 @@ branches or with a lookup table.
%cond = icmp eq, i32 %a, %b
br i1 %cond, label %IfEqual, label %IfUnequal
IfEqual:
Test:
%cond = icmp eq i32 %a, %b
br i1 %cond, label %IfEqual, label %IfUnequal
IfEqual:
ret i32 1
IfUnequal:
ret i32 0
; Emulate a conditional br instruction %Val = zext i1 %value to i32 - switch i32 %Val, label %truedest [i32 0, label %falsedest ] + switch i32 %Val, label %truedest [ i32 0, label %falsedest ] ; Emulate an unconditional br instruction switch i32 0, label %dest [ ] ; Implement a jump table: - switch i32 %val, label %otherwise [ i32 0, label %onzero - i32 1, label %onone - i32 2, label %ontwo ] + switch i32 %val, label %otherwise [ i32 0, label %onzero + i32 1, label %onone + i32 2, label %ontwo ]@@ -2026,7 +2342,7 @@ branches or with a lookup table.
- <result> = invoke [cconv] <ptr to function ty> <function ptr val>(<function args>) + <result> = invoke [cconv] [ret attrs] <ptr to function ty> <function ptr val>(<function args>) [fn attrs] to label <normal label> unwind label <exception label>@@ -2039,9 +2355,7 @@ function, with the possibility of control flow transfer to either the "ret" instruction, control flow will return to the "normal" label. If the callee (or any indirect callees) returns with the "unwind" instruction, control is interrupted and -continued at the dynamically nearest "exception" label. If the callee function -returns multiple values then individual return values are only accessible through -a 'getresult' instruction. +continued at the dynamically nearest "exception" label.
For the purposes of the SSA form, the definition of the value +returned by the 'invoke' instruction is deemed to occur on +the edge from the current block to the "normal" label. If the callee +unwinds then no return value is available.
+%retval = invoke i32 @Test(i32 15) to label %Continue @@ -2182,16 +2509,15 @@ The result value has the same type as its operands.+ + +Arguments:
The two arguments to the 'add' instruction must be integer, floating point, or - vector values. Both arguments must have identical - types.
+ href="#t_integer">integer or + vector of integer values. Both arguments must + have identical types.Semantics:
-The value produced is the integer or floating point sum of the two -operands.
+The value produced is the integer sum of the two operands.
-If an integer sum has unsigned overflow, the result returned is the +
If the sum has unsigned overflow, the result returned is the mathematical result modulo 2n, where n is the bit width of the result.
@@ -2205,6 +2531,39 @@ instruction is appropriate for both signed and unsigned integers.
+ <result> = fadd <ty> <op1>, <op2> ; yields {ty}:result
+
+
+The 'fadd' instruction returns the sum of its two operands.
+ +The two arguments to the 'fadd' instruction must be +floating point or vector of +floating point values. Both arguments must have identical types.
+ +The value produced is the floating point sum of the two operands.
+ +
+ <result> = fadd float 4.0, %var ; yields {float}:result = 4.0 + %var
+
+The two arguments to the 'sub' instruction must be integer, floating point, - or vector values. Both arguments must have identical - types.
+ href="#t_integer">integer or vector of + integer values. Both arguments must have identical types.The value produced is the integer or floating point difference of -the two operands.
+The value produced is the integer difference of the two operands.
-If an integer difference has unsigned overflow, the result returned is the +
If the difference has unsigned overflow, the result returned is the mathematical result modulo 2n, where n is the bit width of the result.
@@ -2252,6 +2609,45 @@ instruction is appropriate for both signed and unsigned integers. + + + +
+ <result> = fsub <ty> <op1>, <op2> ; yields {ty}:result
+
+
+The 'fsub' instruction returns the difference of its two +operands.
+ +Note that the 'fsub' instruction is used to represent the +'fneg' instruction present in most other intermediate +representations.
+ +The two arguments to the 'fsub' instruction must be floating point or vector + of floating point values. Both arguments must have identical types.
+ +The value produced is the floating point difference of the two operands.
+ +
+ <result> = fsub float 4.0, %var ; yields {float}:result = 4.0 - %var
+ <result> = fsub float -0.0, %val ; yields {float}:result = -%var
+
+The two arguments to the 'mul' instruction must be integer, floating point, -or vector values. Both arguments must have identical -types.
+href="#t_integer">integer or vector of integer +values. Both arguments must have identical types.The value produced is the integer or floating point product of the -two operands.
+The value produced is the integer product of the two operands.
-If the result of an integer multiplication has unsigned overflow, +
If the result of the multiplication has unsigned overflow, the result returned is the mathematical result modulo 2n, where n is the bit width of the result.
Because LLVM integers use a two's complement representation, and the @@ -2292,6 +2686,35 @@ width of the full product.
<result> = fmul <ty> <op1>, <op2> ; yields {ty}:result
+
+The 'fmul' instruction returns the product of its two +operands.
+ +The two arguments to the 'fmul' instruction must be +floating point or vector +of floating point values. Both arguments must have identical types.
+ +The value produced is the floating point product of the two operands.
+ + <result> = fmul float 4.0, %var ; yields {float}:result = 4.0 * %var
+
+The value produced is op1 * 2op2 mod 2n, where n is the width of the result. If op2 is (statically or dynamically) negative or -equal to or larger than the number of bits in op1, the result is undefined.
+equal to or larger than the number of bits in op1, the result is undefined. +If the arguments are vectors, each vector element of op1 is shifted by the +corresponding shift amount in op2.
<result> = shl i32 4, %var ; yields {i32}: 4 << %var
<result> = shl i32 4, 2 ; yields {i32}: 16
<result> = shl i32 1, 10 ; yields {i32}: 1024
<result> = shl i32 1, 32 ; undefined
+ <result> = shl <2 x i32> < i32 1, i32 1>, < i32 1, i32 2> ; yields: result=<2 x i32> < i32 2, i32 4>
@@ -2548,7 +2974,9 @@ type. 'op2' is treated as an unsigned value.
This instruction always performs a logical shift right operation. The most significant bits of the result will be filled with zero bits after the shift. If op2 is (statically or dynamically) equal to or larger than -the number of bits in op1, the result is undefined.
+the number of bits in op1, the result is undefined. If the arguments are +vectors, each vector element of op1 is shifted by the corresponding shift +amount in op2.
@@ -2557,6 +2985,7 @@ the number of bits in op1, the result is undefined.
<result> = lshr i8 4, 3 ; yields {i8}:result = 0
<result> = lshr i8 -2, 1 ; yields {i8}:result = 0x7FFFFFFF
<result> = lshr i32 1, 32 ; undefined
+ <result> = lshr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 2> ; yields: result=<2 x i32> < i32 0x7FFFFFFF, i32 1>
@@ -2582,8 +3011,9 @@ type. 'op2' is treated as an unsigned value.
This instruction always performs an arithmetic shift right operation, The most significant bits of the result will be filled with the sign bit of op1. If op2 is (statically or dynamically) equal to or -larger than the number of bits in op1, the result is undefined. -
+larger than the number of bits in op1, the result is undefined. If the +arguments are vectors, each vector element of op1 is shifted by the +corresponding shift amount in op2.
@@ -2592,6 +3022,7 @@ larger than the number of bits in op1, the result is undefined.
<result> = ashr i8 4, 3 ; yields {i8}:result = 0
<result> = ashr i8 -2, 1 ; yields {i8}:result = -1
<result> = ashr i32 1, 32 ; undefined
+ <result> = ashr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 3> ; yields: result=<2 x i32> < i32 -1, i32 0>
@@ -2891,23 +3322,25 @@ exceeds the length of val, the results are undefined.
- <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <n x i32> <mask> ; yields <n x <ty>> + <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask> ; yields <m x <ty>>
The 'shufflevector' instruction constructs a permutation of elements -from two input vectors, returning a vector of the same type. +from two input vectors, returning a vector with the same element type as +the input and length that is the same as the shuffle mask.
-The first two operands of a 'shufflevector' instruction are vectors -with types that match each other and types that match the result of the -instruction. The third argument is a shuffle mask, which has the same number -of elements as the other vector type, but whose element type is always 'i32'. +The first two operands of a 'shufflevector' instruction are vectors +with types that match each other. The third argument is a shuffle mask whose +element type is always 'i32'. The result of the instruction is a vector whose +length is the same as the shuffle mask and whose element type is the same as +the element type of the first two operands.
@@ -2920,7 +3353,7 @@ constant integer or undef values.
The elements of the two input vectors are numbered from left to right across both of the vectors. The shuffle mask operand specifies, for each element of -the result vector, which element of the two input registers the result element +the result vector, which element of the two input vectors the result element gets. The element selector may be undef (meaning "don't care") and the second operand may be undef if performing a shuffle from only one vector.
@@ -2932,6 +3365,10 @@ operand may be undef if performing a shuffle from only one vector. <4 x i32> <i32 0, i32 4, i32 1, i32 5> ; yields <4 x i32> %result = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; yields <4 x i32> - Identity shuffle. + %result = shufflevector <8 x i32> %v1, <8 x i32> undef, + <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; yields <4 x i32> + %result = shufflevector <4 x i32> %v1, <4 x i32> %v2, + <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > ; yields <8 x i32> @@ -3027,6 +3464,7 @@ indices in a 'getelementptr' instruction. The value to insert must have the same type as the value identified by the indices. +'type' must be a sized type.
Memory is allocated using the system "malloc" function, and -a pointer is returned. The result of a zero byte allocattion is undefined. The +a pointer is returned. The result of a zero byte allocation is undefined. The result is null if there is insufficient memory available.
- %array = malloc [4 x i8 ] ; yields {[%4 x i8]*}:array
+ %array = malloc [4 x i8] ; yields {[%4 x i8]*}:array
%size = add i32 2, 2 ; yields {i32}:size = i32 4
%array1 = malloc i8, i32 4 ; yields {i8*}:array1
@@ -3107,6 +3546,10 @@ result is null if there is insufficient memory available.
%array3 = malloc i32, i32 4, align 1024 ; yields {i32*}:array3
%array4 = malloc i32, align 1024 ; yields {i32*}:array4
+
+Note that the code generator does not yet respect the + alignment value.
+ @@ -3119,7 +3562,7 @@ result is null if there is insufficient memory available.
- free <type> <value> ; yields {void}
+ free <type> <value> ; yields {void}
- %array = malloc [4 x i8] ; yields {[4 x i8]*}:array + %array = malloc [4 x i8] ; yields {[4 x i8]*}:array free [4 x i8]* %array@@ -3173,15 +3616,16 @@ space (address space zero). bytes of memory on the runtime stack, returning a pointer of the appropriate type to the program. If "NumElements" is specified, it is the number of elements allocated, otherwise "NumElements" is defaulted to be one. -If a constant alignment is specified, the value result of the allocation is guaranteed -to be aligned to at least that boundary. If not specified, or if zero, the target -can choose to align the allocation on any convenient boundary. +If a constant alignment is specified, the value result of the allocation is +guaranteed to be aligned to at least that boundary. If not specified, or if +zero, the target can choose to align the allocation on any convenient boundary +compatible with the type.
'type' may be any sized type.
Memory is allocated; a pointer is returned. The operation is undefiend if +
Memory is allocated; a pointer is returned. The operation is undefined if there is insufficient stack space for the allocation. 'alloca'd memory is automatically released when the function returns. The 'alloca' instruction is commonly used to represent automatic variables that must @@ -3193,10 +3637,10 @@ is legal, but the result is undefined.
- %ptr = alloca i32 ; yields {i32*}:ptr
- %ptr = alloca i32, i32 4 ; yields {i32*}:ptr
- %ptr = alloca i32, i32 4, align 1024 ; yields {i32*}:ptr
- %ptr = alloca i32, align 1024 ; yields {i32*}:ptr
+ %ptr = alloca i32 ; yields {i32*}:ptr
+ %ptr = alloca i32, i32 4 ; yields {i32*}:ptr
+ %ptr = alloca i32, i32 4, align 1024 ; yields {i32*}:ptr
+ %ptr = alloca i32, align 1024 ; yields {i32*}:ptr
@@ -3227,7 +3671,13 @@ alignment may produce less efficient code. An alignment of 1 is always
safe.
The location of memory pointed to is loaded.
+The location of memory pointed to is loaded. If the value being loaded +is of scalar type then the number of bytes read does not exceed the minimum +number of bytes needed to hold all bits of the type. For example, loading an +i24 reads at most three bytes. When loading a value of a type like +i20 with a size that is not an integral number of bytes, the result +is undefined if the value was not originally written using a store of the +same type.
%ptr = alloca i32 ; yields {i32*}:ptrSemantics:
The contents of memory are updated to contain '<value>' -at the location specified by the '<pointer>' operand.
+at the location specified by the '<pointer>' operand. +If '<value>' is of scalar type then the number of bytes +written does not exceed the minimum number of bytes needed to hold all +bits of the type. For example, storing an i24 writes at most +three bytes. When writing a value of a type like i20 with a +size that is not an integral number of bytes, it is unspecified what +happens to the extra bits that do not belong to the type, but they will +typically be overwritten.Example:
%ptr = alloca i32 ; yields {i32*}:ptr store i32 3, i32* %ptr ; yields {void} @@ -3282,25 +3739,33 @@ at the location specified by the '<pointer>' operand.instruction.@@ -3723,7 +4189,7 @@ the value cannot fit in the floating point value, the results are undefined.Syntax:
- <result> = getelementptr <ty>* <ptrval>{, <ty> <idx>}* + <result> = getelementptr <pty>* <ptrval>{, <ty> <idx>}*Overview:
The 'getelementptr' instruction is used to get the address of a -subelement of an aggregate data structure.
+subelement of an aggregate data structure. It performs address calculation only +and does not access memory.Arguments:
-This instruction takes a list of integer operands that indicate what -elements of the aggregate object to index to. The actual types of the arguments -provided depend on the type of the first pointer argument. The -'getelementptr' instruction is used to index down through the type -levels of a structure or to a specific index in an array. When indexing into a -structure, only i32 integer constants are allowed. When indexing -into an array or pointer, only integers of 32 or 64 bits are allowed; 32-bit -values will be sign extended to 64-bits if required.
+The first argument is always a pointer, and forms the basis of the +calculation. The remaining arguments are indices, that indicate which of the +elements of the aggregate object are indexed. The interpretation of each index +is dependent on the type being indexed into. The first index always indexes the +pointer value given as the first argument, the second index indexes a value of +the type pointed to (not necessarily the value directly pointed to, since the +first index can be non-zero), etc. The first type indexed into must be a pointer +value, subsequent types can be arrays, vectors and structs. Note that subsequent +types being indexed into can never be pointers, since that would require loading +the pointer before continuing calculation.
+ +The type of each index argument depends on the type it is indexing into. +When indexing into a (packed) structure, only i32 integer +constants are allowed. When indexing into an array, pointer or vector, +integers of any width are allowed (also non-constants).
For example, let's consider a C code fragment and how it gets compiled to LLVM:
@@ -3328,8 +3793,8 @@ int *foo(struct ST *s) {@@ -3689,7 +4155,7 @@ the value cannot fit in the floating point value, the results are undefined.-%RT = type { i8 , [10 x [20 x i32]], i8 } -%ST = type { i32, double, %RT } +%RT = type { i8 , [10 x [20 x i32]], i8 } +%ST = type { i32, double, %RT } define i32* %foo(%ST* %s) { entry: @@ -3341,13 +3806,6 @@ entry:-Semantics:
-The index types specified for the 'getelementptr' instruction depend -on the pointer type that is being indexed into. Pointer -and array types can use a 32-bit or 64-bit -integer type but the value will always be sign extended -to 64-bits. Structure and packed -structure types require i32 constants.
-In the example above, the first index is indexing into the '%ST*' type, which is a pointer, yielding a '%ST' = '{ i32, double, %RT }' type, a structure. The second index indexes into the third element of @@ -3373,11 +3831,13 @@ the LLVM code for the given testcase is equivalent to:
}Note that it is undefined to access an array out of bounds: array and -pointer indexes must always be within the defined bounds of the array type. -The one exception for this rule is zero length arrays. These arrays are -defined to be accessible as variable length arrays, which requires access -beyond the zero'th element.
+Note that it is undefined to access an array out of bounds: array +and pointer indexes must always be within the defined bounds of the +array type when accessed with an instruction that dereferences the +pointer (e.g. a load or store instruction). The one exception for +this rule is zero length arrays. These arrays are defined to be +accessible as variable length arrays, which requires access beyond the +zero'th element.
The getelementptr instruction is often confusing. For some more insight into how it works, see the getelementptr @@ -3387,7 +3847,13 @@ FAQ.
; yields [12 x i8]*:aptr - %aptr = getelementptr {i32, [12 x i8]}* %sptr, i64 0, i32 1 + %aptr = getelementptr {i32, [12 x i8]}* %saptr, i64 0, i32 1 + ; yields i8*:vptr + %vptr = getelementptr {i32, <2 x i8>}* %svptr, i64 0, i32 1, i32 1 + ; yields i8*:eptr + %eptr = getelementptr [12 x i8]* %aptr, i64 0, i32 1 + ; yields i32*:iptr + %iptr = getelementptr [10 x i32]* @arr, i16 0, i16 0Example:
%X = uitofp i32 257 to float ; yields float:257.0 - %Y = uitofp i8 -1 to double ; yields double:255.0 + %Y = uitofp i8 -1 to double ; yields double:255.0Example:
%X = sitofp i32 257 to float ; yields float:257.0 - %Y = sitofp i8 -1 to double ; yields double:-1.0 + %Y = sitofp i8 -1 to double ; yields double:-1.0@@ -3745,7 +4211,7 @@ the integer type ty2.Arguments:
The 'ptrtoint' instruction takes a value to cast, which must be a pointer value, and a type to cast it to -ty2, which must be an integer type. +ty2, which must be an integer type.
Semantics:
The 'ptrtoint' instruction converts value to integer type @@ -3781,7 +4247,7 @@ a pointer type, ty2.
Arguments:
The 'inttoptr' instruction takes an integer value to cast, and a type to cast it to, which must be a -pointer type. +pointer type.
Semantics:
The 'inttoptr' instruction converts value to type @@ -3839,7 +4305,7 @@ other types, use the inttoptr or
%X = bitcast i8 255 to i8 ; yields i8 :-1 %Y = bitcast i32* %x to sint* ; yields sint*:%x - %Z = bitcast <2xint> %V to i64; ; yields i64: %V + %Z = bitcast <2 x int> %V to i64; ; yields i64: %V@@ -3855,7 +4321,7 @@ instructions, which defy better classification.@@ -3931,12 +4403,12 @@ Otherwise, the result is an i1.Syntax:
-<result> = icmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:result ++ +<result> = icmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:resultOverview:
The 'icmp' instruction returns a boolean value or @@ -3865,6 +4331,7 @@ of its two integer, integer vector, or pointer operands.
The 'icmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not a value, just a keyword. The possible condition code are: +
- eq: equal
- ne: not equal
@@ -3885,12 +4352,13 @@ They must also be identical types.The 'icmp' compares op1 and op2 according to the condition code given as cond. The comparison performed always yields either an i1 or vector of i1 result, as follows: +
- eq: yields true if the operands are equal, false otherwise. No sign interpretation is necessary or performed.
- ne: yields true if the operands are unequal, - false otherwise. No sign interpretation is necessary or performed. + false otherwise. No sign interpretation is necessary or performed.
- ugt: interprets the operands as unsigned values and yields true if op1 is greater than op2.
- uge: interprets the operands as unsigned values and yields @@ -3924,6 +4392,10 @@ Otherwise, the result is an i1. <result> = icmp ule i16 -4, 5 ; yields: result=false <result> = icmp sge i16 4, 5 ; yields: result=false
Note that the code generator does not yet support vector types with + the icmp instruction.
+- - -Syntax:
-<result> = fcmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:result +-<result> = fcmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:resultOverview:
The 'fcmp' instruction returns a boolean value or vector of boolean values based on comparison -of its operands. +of its operands.
If the operands are floating point scalars, then the result type is a boolean (i1). @@ -3947,7 +4419,7 @@ operands being compared.
Arguments:
The 'fcmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not -a value, just a keyword. The possible condition code are: +a value, just a keyword. The possible condition code are:
- false: no comparison, always returns false
- oeq: ordered and equal
@@ -3978,7 +4450,7 @@ according to the condition code given as cond. If the operands are vectors, then the vectors are compared element by element. Each comparison performed -always yields an i1 result, as follows: +always yields an i1 result, as follows:
- false: always yields false, regardless of operands.
- oeq: yields true if both operands are not a QNAN and @@ -4016,106 +4488,10 @@ always yields an i1 result, as follows: <result> = fcmp olt float 4.0, 5.0 ; yields: result=true <result> = fcmp ueq double 1.0, 2.0 ; yields: result=false
-- - - -Syntax:
-<result> = vicmp <cond> <ty> <op1>, <op2> ; yields {ty}:result --Overview:
-The 'vicmp' instruction returns an integer vector value based on -element-wise comparison of its two integer vector operands.
-Arguments:
-The 'vicmp' instruction takes three operands. The first operand is -the condition code indicating the kind of comparison to perform. It is not -a value, just a keyword. The possible condition code are: -
-
-- eq: equal
-- ne: not equal
-- ugt: unsigned greater than
-- uge: unsigned greater or equal
-- ult: unsigned less than
-- ule: unsigned less or equal
-- sgt: signed greater than
-- sge: signed greater or equal
-- slt: signed less than
-- sle: signed less or equal
-The remaining two arguments must be vector or -integer typed. They must also be identical types.
-Semantics:
-The 'vicmp' instruction compares op1 and op2 -according to the condition code given as cond. The comparison yields a -vector of integer result, of -identical type as the values being compared. The most significant bit in each -element is 1 if the element-wise comparison evaluates to true, and is 0 -otherwise. All other bits of the result are undefined. The condition codes -are evaluated identically to the 'icmp' -instruction. - -
Example:
-- <result> = vicmp eq <2 x i32> < i32 4, i32 0>, < i32 5, i32 0> ; yields: result=<2 x i32> < i32 0, i32 -1 > - <result> = vicmp ult <2 x i8 > < i8 1, i8 2>, < i8 2, i8 2 > ; yields: result=<2 x i8> < i8 -1, i8 0 > ---@@ -4144,6 +4520,11 @@ may be used as the label arguments. block and the PHI instructions: i.e. PHI instructions must be first in a basic block. +Syntax:
-<result> = vfcmp <cond> <ty> <op1>, <op2>-Overview:
-The 'vfcmp' instruction returns an integer vector value based on -element-wise comparison of its two floating point vector operands. The output -elements have the same width as the input elements.
-Arguments:
-The 'vfcmp' instruction takes three operands. The first operand is -the condition code indicating the kind of comparison to perform. It is not -a value, just a keyword. The possible condition code are: -
-
-- false: no comparison, always returns false
-- oeq: ordered and equal
-- ogt: ordered and greater than
-- oge: ordered and greater than or equal
-- olt: ordered and less than
-- ole: ordered and less than or equal
-- one: ordered and not equal
-- ord: ordered (no nans)
-- ueq: unordered or equal
-- ugt: unordered or greater than
-- uge: unordered or greater than or equal
-- ult: unordered or less than
-- ule: unordered or less than or equal
-- une: unordered or not equal
-- uno: unordered (either nans)
-- true: no comparison, always returns true
-The remaining two arguments must be vector of -floating point typed. They must also be identical -types.
-Semantics:
-The 'vfcmp' instruction compares op1 and op2 -according to the condition code given as cond. The comparison yields a -vector of integer result, with -an identical number of elements as the values being compared, and each element -having identical with to the width of the floating point elements. The most -significant bit in each element is 1 if the element-wise comparison evaluates to -true, and is 0 otherwise. All other bits of the result are undefined. The -condition codes are evaluated identically to the -'fcmp' instruction. +
Note that the code generator does not yet support vector types with + the fcmp instruction.
-Example:
-- <result> = vfcmp oeq <2 x float> < float 4, float 0 >, < float 5, float 0 > ; yields: result=<2 x i32> < i32 0, i32 -1 > - <result> = vfcmp ult <2 x double> < double 1, double 2 >, < double 2, double 2> ; yields: result=<2 x i64> < i64 -1, i64 0 > -For the purposes of the SSA form, the use of each incoming value is +deemed to occur on the edge from the corresponding predecessor block +to the current block (but after any definition of an 'invoke' +instruction's return value on the same edge).
+Semantics:
At runtime, the 'phi' instruction logically takes on the value @@ -4171,7 +4552,7 @@ Loop: ; Infinite loop that counts from 0 on up...
<result> = select selty <cond>, <ty> <val1>, <ty> <val2> ; yields ty - selty is either i1 or {<N x i1>} + selty is either i1 or {<N x i1>}Overview:
@@ -4210,6 +4591,10 @@ by element.%X = select i1 true, i8 17, i8 42 ; yields i8:17+ +Note that the code generator does not yet support conditions + with vector type.
+ @@ -4222,7 +4607,7 @@ by element.Syntax:
- <result> = [tail] call [cconv] <ty> [<fnty>*] <fnptrval>(<param list>) + <result> = [tail] call [cconv] [ret attrs] <ty> [<fnty>*] <fnptrval>(<function args>) [fn attrs]Overview:
@@ -4239,13 +4624,20 @@ by element. any allocas or varargs in the caller. If the "tail" marker is present, the function call is eligible for tail call optimization. Note that calls may be marked "tail" even if they do not occur before a ret instruction. + href="#i_ret">ret
The optional "cconv" marker indicates which calling convention the call should use. If none is specified, the call defaults - to using C calling conventions. + to using C calling conventions.
+The optional Parameter Attributes list for + return values. Only 'zeroext', 'signext', + and 'inreg' attributes are valid here.
'ty': the type of the call instruction itself which is also the type of the return value. Functions that return no value are marked @@ -4270,6 +4662,11 @@ by element. indicates the function accepts a variable number of arguments, the extra arguments can be specified.
The optional function attributes list. Only + 'noreturn', 'nounwind', 'readonly' and + 'readnone' attributes are valid here.
+See the variable argument processing section.
- - - - - -- <resultval> = getresult <type> <retval>, <index> -- -
The 'getresult' instruction is used to extract individual values -from a 'call' -or 'invoke' instruction that returns multiple -results.
- -The 'getresult' instruction takes a call or invoke value as its -first argument, or an undef value. The value must have structure type. The second argument is a constant -unsigned index value which must be in range for the number of values returned -by the call.
- -The 'getresult' instruction extracts the element identified by -'index' from the aggregate value.
- -
- %struct.A = type { i32, i8 }
-
- %r = call %struct.A @foo()
- %gr = getresult %struct.A %r, 0 ; yields i32:%gr
- %gr1 = getresult %struct.A %r, 1 ; yields i8:%gr1
- add i32 %gr, 42
- add i8 %gr1, 41
-
+Note that the code generator does not yet fully support va_arg + on many targets. Also, it does not currently support va_arg with + aggregate types on any target.
declare void %llvm.va_start(i8* <arglist>)
The 'llvm.va_start' intrinsic initializes +
The 'llvm.va_start' intrinsic initializes *<arglist> for subsequent use by va_arg.
The argument is a pointer to a va_list element to initialize.
+The argument is a pointer to a va_list element to initialize.
The 'llvm.va_start' intrinsic works just like the va_start +
The 'llvm.va_start' intrinsic works just like the va_start macro available in C. In a target-dependent way, it initializes the va_list element to which the argument points, so that the next call to va_arg will produce the first variable argument passed to the function. @@ -5031,7 +5386,13 @@ for more efficient code generation.
This is an overloaded intrinsic. You can use llvm.memcpy on any integer bit +width. Not all targets support all bit widths however.
+ declare void @llvm.memcpy.i8(i8 * <dest>, i8 * <src>,
+ i8 <len>, i32 <align>)
+ declare void @llvm.memcpy.i16(i8 * <dest>, i8 * <src>,
+ i16 <len>, i32 <align>)
declare void @llvm.memcpy.i32(i8 * <dest>, i8 * <src>,
i32 <len>, i32 <align>)
declare void @llvm.memcpy.i64(i8 * <dest>, i8 * <src>,
@@ -5085,7 +5446,13 @@ be set to 0 or 1.
Syntax:
+This is an overloaded intrinsic. You can use llvm.memmove on any integer bit
+width. Not all targets support all bit widths however.
+ declare void @llvm.memmove.i8(i8 * <dest>, i8 * <src>,
+ i8 <len>, i32 <align>)
+ declare void @llvm.memmove.i16(i8 * <dest>, i8 * <src>,
+ i16 <len>, i32 <align>)
declare void @llvm.memmove.i32(i8 * <dest>, i8 * <src>,
i32 <len>, i32 <align>)
declare void @llvm.memmove.i64(i8 * <dest>, i8 * <src>,
@@ -5140,7 +5507,13 @@ be set to 0 or 1.
Syntax:
+This is an overloaded intrinsic. You can use llvm.memset on any integer bit
+width. Not all targets support all bit widths however.
+ declare void @llvm.memset.i8(i8 * <dest>, i8 <val>,
+ i8 <len>, i32 <align>)
+ declare void @llvm.memset.i16(i8 * <dest>, i8 <val>,
+ i16 <len>, i32 <align>)
declare void @llvm.memset.i32(i8 * <dest>, i8 <val>,
i32 <len>, i32 <align>)
declare void @llvm.memset.i64(i8 * <dest>, i8 <val>,
@@ -5195,7 +5568,7 @@ this can be specified as the fourth argument, otherwise it should be set to 0 or
Syntax:
This is an overloaded intrinsic. You can use llvm.sqrt on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.sqrt.f32(float %Val)
declare double @llvm.sqrt.f64(double %Val)
@@ -5239,7 +5612,7 @@ floating point number.
Syntax:
This is an overloaded intrinsic. You can use llvm.powi on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.powi.f32(float %Val, i32 %power)
declare double @llvm.powi.f64(double %Val, i32 %power)
@@ -5281,7 +5654,7 @@ unspecified sequence of rounding operations.
Syntax:
This is an overloaded intrinsic. You can use llvm.sin on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.sin.f32(float %Val)
declare double @llvm.sin.f64(double %Val)
@@ -5320,7 +5693,7 @@ conditions in the same way.
Syntax:
This is an overloaded intrinsic. You can use llvm.cos on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.cos.f32(float %Val)
declare double @llvm.cos.f64(double %Val)
@@ -5359,7 +5732,7 @@ conditions in the same way.
Syntax:
This is an overloaded intrinsic. You can use llvm.pow on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.pow.f32(float %Val, float %Power)
declare double @llvm.pow.f64(double %Val, double %Power)
@@ -5414,7 +5787,7 @@ These allow efficient code generation for some algorithms.
Syntax:
This is an overloaded intrinsic function. You can use bswap on any integer
-type that is an even number of bytes (i.e. BitWidth % 16 == 0).
+type that is an even number of bytes (i.e. BitWidth % 16 == 0).
declare i16 @llvm.bswap.i16(i16 <id>)
declare i32 @llvm.bswap.i32(i32 <id>)
@@ -5453,9 +5826,9 @@ additional even-byte lengths (6 bytes, 8 bytes and more, respectively).
Syntax:
This is an overloaded intrinsic. You can use llvm.ctpop on any integer bit
-width. Not all targets support all bit widths however.
+width. Not all targets support all bit widths however.
- declare i8 @llvm.ctpop.i8 (i8 <src>)
+ declare i8 @llvm.ctpop.i8(i8 <src>)
declare i16 @llvm.ctpop.i16(i16 <src>)
declare i32 @llvm.ctpop.i32(i32 <src>)
declare i64 @llvm.ctpop.i64(i64 <src>)
@@ -5492,7 +5865,7 @@ The 'llvm.ctpop' intrinsic counts the 1's in a variable.
Syntax:
This is an overloaded intrinsic. You can use llvm.ctlz on any
-integer bit width. Not all targets support all bit widths however.
+integer bit width. Not all targets support all bit widths however.
declare i8 @llvm.ctlz.i8 (i8 <src>)
declare i16 @llvm.ctlz.i16(i16 <src>)
@@ -5535,7 +5908,7 @@ of src. For example, llvm.ctlz(i32 2) = 30.
Syntax:
This is an overloaded intrinsic. You can use llvm.cttz on any
-integer bit width. Not all targets support all bit widths however.
+integer bit width. Not all targets support all bit widths however.
declare i8 @llvm.cttz.i8 (i8 <src>)
declare i16 @llvm.cttz.i16(i16 <src>)
@@ -5567,103 +5940,308 @@ of src. For example, llvm.cttz(2) = 1.
+
+
+
+
+
+
+LLVM provides intrinsics for some arithmetic with overflow operations.
+
+
+
+
Syntax:
-This is an overloaded intrinsic. You can use llvm.part.select
-on any integer bit width.
+
+
This is an overloaded intrinsic. You can use llvm.sadd.with.overflow
+on any integer bit width.
+
- declare i17 @llvm.part.select.i17 (i17 %val, i32 %loBit, i32 %hiBit)
- declare i29 @llvm.part.select.i29 (i29 %val, i32 %loBit, i32 %hiBit)
+ declare {i16, i1} @llvm.sadd.with.overflow.i16(i16 %a, i16 %b)
+ declare {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
+ declare {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
Overview:
-The 'llvm.part.select' family of intrinsic functions selects a
-range of bits from an integer value and returns them in the same bit width as
-the original value.
+
+The 'llvm.sadd.with.overflow' family of intrinsic functions perform
+a signed addition of the two arguments, and indicate whether an overflow
+occurred during the signed summation.
Arguments:
-The first argument, %val and the result may be integer types of
-any bit width but they must have the same bit width. The second and third
-arguments must be i32 type since they specify only a bit index.
+
+The arguments (%a and %b) and the first element of the result structure may
+be of integer types of any bit width, but they must have the same bit width. The
+second element of the result structure must be of type i1. %a
+and %b are the two values that will undergo signed addition.
Semantics:
-The operation of the 'llvm.part.select' intrinsic has two modes
-of operation: forwards and reverse. If %loBit is greater than
-%hiBits then the intrinsic operates in reverse mode. Otherwise it
-operates in forward mode.
-In forward mode, this intrinsic is the equivalent of shifting %val
-right by %loBit bits and then ANDing it with a mask with
-only the %hiBit - %loBit bits set, as follows:
-
- - The %val is shifted right (LSHR) by the number of bits specified
- by %loBits. This normalizes the value to the low order bits.
- - The %loBits value is subtracted from the %hiBits value
- to determine the number of bits to retain.
- - A mask of the retained bits is created by shifting a -1 value.
- - The mask is ANDed with %val to produce the result.
-
-In reverse mode, a similar computation is made except that the bits are
-returned in the reverse order. So, for example, if X has the value
-i16 0x0ACF (101011001111) and we apply
-part.select(i16 X, 8, 3) to it, we get back the value
-i16 0x0026 (000000100110).
+
+The 'llvm.sadd.with.overflow' family of intrinsic functions perform
+a signed addition of the two variables. They return a structure — the
+first element of which is the signed summation, and the second element of which
+is a bit specifying if the signed summation resulted in an overflow.
+
+Examples:
+
+ %res = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
+ %sum = extractvalue {i32, i1} %res, 0
+ %obit = extractvalue {i32, i1} %res, 1
+ br i1 %obit, label %overflow, label %normal
+
+
+
Syntax:
-This is an overloaded intrinsic. You can use llvm.part.set
-on any integer bit width.
+
+
This is an overloaded intrinsic. You can use llvm.uadd.with.overflow
+on any integer bit width.
+
- declare i17 @llvm.part.set.i17.i9 (i17 %val, i9 %repl, i32 %lo, i32 %hi)
- declare i29 @llvm.part.set.i29.i9 (i29 %val, i9 %repl, i32 %lo, i32 %hi)
+ declare {i16, i1} @llvm.uadd.with.overflow.i16(i16 %a, i16 %b)
+ declare {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
+ declare {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
Overview:
-The 'llvm.part.set' family of intrinsic functions replaces a range
-of bits in an integer value with another integer value. It returns the integer
-with the replaced bits.
+
+The 'llvm.uadd.with.overflow' family of intrinsic functions perform
+an unsigned addition of the two arguments, and indicate whether a carry occurred
+during the unsigned summation.
Arguments:
-The first argument, %val and the result may be integer types of
-any bit width but they must have the same bit width. %val is the value
-whose bits will be replaced. The second argument, %repl may be an
-integer of any bit width. The third and fourth arguments must be i32
-type since they specify only a bit index.
+
+The arguments (%a and %b) and the first element of the result structure may
+be of integer types of any bit width, but they must have the same bit width. The
+second element of the result structure must be of type i1. %a
+and %b are the two values that will undergo unsigned addition.
Semantics:
-The operation of the 'llvm.part.set' intrinsic has two modes
-of operation: forwards and reverse. If %lo is greater than
-%hi then the intrinsic operates in reverse mode. Otherwise it
-operates in forward mode.
-For both modes, the %repl value is prepared for use by either
-truncating it down to the size of the replacement area or zero extending it
-up to that size.
-In forward mode, the bits between %lo and %hi (inclusive)
-are replaced with corresponding bits from %repl. That is the 0th bit
-in %repl replaces the %loth bit in %val and etc. up
-to the %hith bit.
-
In reverse mode, a similar computation is made except that the bits are
-reversed. That is, the 0th bit in %repl replaces the
-%hi bit in %val and etc. down to the %loth bit.
+
+
The 'llvm.uadd.with.overflow' family of intrinsic functions perform
+an unsigned addition of the two arguments. They return a structure — the
+first element of which is the sum, and the second element of which is a bit
+specifying if the unsigned summation resulted in a carry.
+
Examples:
- llvm.part.set(0xFFFF, 0, 4, 7) -> 0xFF0F
- llvm.part.set(0xFFFF, 0, 7, 4) -> 0xFF0F
- llvm.part.set(0xFFFF, 1, 7, 4) -> 0xFF8F
- llvm.part.set(0xFFFF, F, 8, 3) -> 0xFFE7
- llvm.part.set(0xFFFF, 0, 3, 8) -> 0xFE07
+ %res = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
+ %sum = extractvalue {i32, i1} %res, 0
+ %obit = extractvalue {i32, i1} %res, 1
+ br i1 %obit, label %carry, label %normal
+
+
+
+
+
+
+
+
+Syntax:
+
+This is an overloaded intrinsic. You can use llvm.ssub.with.overflow
+on any integer bit width.
+
+
+ declare {i16, i1} @llvm.ssub.with.overflow.i16(i16 %a, i16 %b)
+ declare {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
+ declare {i64, i1} @llvm.ssub.with.overflow.i64(i64 %a, i64 %b)
+
+
+Overview:
+
+The 'llvm.ssub.with.overflow' family of intrinsic functions perform
+a signed subtraction of the two arguments, and indicate whether an overflow
+occurred during the signed subtraction.
+
+Arguments:
+
+The arguments (%a and %b) and the first element of the result structure may
+be of integer types of any bit width, but they must have the same bit width. The
+second element of the result structure must be of type i1. %a
+and %b are the two values that will undergo signed subtraction.
+
+Semantics:
+
+The 'llvm.ssub.with.overflow' family of intrinsic functions perform
+a signed subtraction of the two arguments. They return a structure — the
+first element of which is the subtraction, and the second element of which is a bit
+specifying if the signed subtraction resulted in an overflow.
+
+Examples:
+
+ %res = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
+ %sum = extractvalue {i32, i1} %res, 0
+ %obit = extractvalue {i32, i1} %res, 1
+ br i1 %obit, label %overflow, label %normal
+
+
+
+
+
+
+
+
+
+Syntax:
+
+This is an overloaded intrinsic. You can use llvm.usub.with.overflow
+on any integer bit width.
+
+
+ declare {i16, i1} @llvm.usub.with.overflow.i16(i16 %a, i16 %b)
+ declare {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
+ declare {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
+
+
+Overview:
+
+The 'llvm.usub.with.overflow' family of intrinsic functions perform
+an unsigned subtraction of the two arguments, and indicate whether an overflow
+occurred during the unsigned subtraction.
+
+Arguments:
+
+The arguments (%a and %b) and the first element of the result structure may
+be of integer types of any bit width, but they must have the same bit width. The
+second element of the result structure must be of type i1. %a
+and %b are the two values that will undergo unsigned subtraction.
+
+Semantics:
+
+The 'llvm.usub.with.overflow' family of intrinsic functions perform
+an unsigned subtraction of the two arguments. They return a structure — the
+first element of which is the subtraction, and the second element of which is a bit
+specifying if the unsigned subtraction resulted in an overflow.
+
+Examples:
+
+ %res = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
+ %sum = extractvalue {i32, i1} %res, 0
+ %obit = extractvalue {i32, i1} %res, 1
+ br i1 %obit, label %overflow, label %normal
+
+
+
+
+
+
+
+
+
+Syntax:
+
+This is an overloaded intrinsic. You can use llvm.smul.with.overflow
+on any integer bit width.
+
+
+ declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
+ declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
+ declare {i64, i1} @llvm.smul.with.overflow.i64(i64 %a, i64 %b)
+
+
+Overview:
+
+The 'llvm.smul.with.overflow' family of intrinsic functions perform
+a signed multiplication of the two arguments, and indicate whether an overflow
+occurred during the signed multiplication.
+
+Arguments:
+
+The arguments (%a and %b) and the first element of the result structure may
+be of integer types of any bit width, but they must have the same bit width. The
+second element of the result structure must be of type i1. %a
+and %b are the two values that will undergo signed multiplication.
+
+Semantics:
+
+The 'llvm.smul.with.overflow' family of intrinsic functions perform
+a signed multiplication of the two arguments. They return a structure —
+the first element of which is the multiplication, and the second element of
+which is a bit specifying if the signed multiplication resulted in an
+overflow.
+
+Examples:
+
+ %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
+ %sum = extractvalue {i32, i1} %res, 0
+ %obit = extractvalue {i32, i1} %res, 1
+ br i1 %obit, label %overflow, label %normal
+
+
+
+
+
+
+
+
+
+Syntax:
+
+This is an overloaded intrinsic. You can use llvm.umul.with.overflow
+on any integer bit width.
+
+
+ declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b)
+ declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
+ declare {i64, i1} @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
+
+
+Overview:
+
+The 'llvm.umul.with.overflow' family of intrinsic functions perform
+a unsigned multiplication of the two arguments, and indicate whether an overflow
+occurred during the unsigned multiplication.
+
+Arguments:
+
+The arguments (%a and %b) and the first element of the result structure may
+be of integer types of any bit width, but they must have the same bit width. The
+second element of the result structure must be of type i1. %a
+and %b are the two values that will undergo unsigned
+multiplication.
+
+Semantics:
+
+The 'llvm.umul.with.overflow' family of intrinsic functions perform
+an unsigned multiplication of the two arguments. They return a structure —
+the first element of which is the multiplication, and the second element of
+which is a bit specifying if the unsigned multiplication resulted in an
+overflow.
+
+Examples:
+
+ %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
+ %sum = extractvalue {i32, i1} %res, 0
+ %obit = extractvalue {i32, i1} %res, 1
+ br i1 %obit, label %overflow, label %normal
+
+
@@ -5822,7 +6400,7 @@ i1 <device> )
ls: load-store barrier
sl: store-load barrier
ss: store-store barrier
- device: barrier applies to device and uncached memory also.
+ device: barrier applies to device and uncached memory also.
Semantics:
@@ -6346,6 +6924,7 @@ This intrinsic allows annotations to be put on arbitrary expressions
with arbitrary strings. This can be useful for special purpose optimizations
that want to look for these annotations. These have no other defined use, they
are ignored by code generation and optimization.
+
@@ -6381,13 +6960,47 @@ call of the abort() function.
+declare void @llvm.stackprotector( i8* <guard>, i8** <slot> ) + ++
+ The llvm.stackprotector intrinsic takes the guard and stores + it onto the stack at slot. The stack slot is adjusted to ensure that + it is placed on the stack before local variables. +
++ The llvm.stackprotector intrinsic requires two pointer arguments. The + first argument is the value loaded from the stack guard + @__stack_chk_guard. The second variable is an alloca that + has enough space to hold the value of the guard. +
++ This intrinsic causes the prologue/epilogue inserter to force the position of + the AllocaInst stack slot to be before local variables on the + stack. This is to ensure that if a local variable on the stack is overwritten, + it will destroy the value of the guard. When the function exits, the guard on + the stack is checked against the original guard. If they're different, then + the program aborts by calling the __stack_chk_fail() function. +
+
+ src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">