<result> = shl <ty> <var1>, <var2> ; yields {ty}:result
+
The 'shl' instruction returns the first operand shifted to the left a specified number of bits.
+Both arguments to the 'shl' instruction must be the same integer type.
+The value produced is var1 * 2var2.
+ +The value produced is var1 * 2var2. If +var2 is (statically or dynamically) equal to or larger than the number +of bits in var1, the result is undefined.
+
<result> = shl i32 4, %var ; yields {i32}: 4 << %var
<result> = shl i32 4, 2 ; yields {i32}: 16
<result> = shl i32 1, 10 ; yields {i32}: 1024
+ <result> = shl i32 1, 32 ; undefined
@@ -2208,9 +2209,11 @@ operand shifted to the right a specified number of bits with zero fill.
integer type.
This instruction always performs a logical shift right operation. The most significant bits of the result will be filled with zero bits after the -shift.
+shift. If var2 is (statically or dynamically) equal to or larger than +the number of bits in var1, the result is undefined.
@@ -2218,6 +2221,7 @@ shift.
<result> = lshr i32 4, 2 ; yields {i32}:result = 1
<result> = lshr i8 4, 3 ; yields {i8}:result = 0
<result> = lshr i8 -2, 1 ; yields {i8}:result = 0x7FFFFFFF
+ <result> = lshr i32 1, 32 ; undefined
@@ -2241,7 +2245,9 @@ operand shifted to the right a specified number of bits with sign extension.
This instruction always performs an arithmetic shift right operation, The most significant bits of the result will be filled with the sign bit -of var1.
+of var1. If var2 is (statically or dynamically) equal to or +larger than the number of bits in var1, the result is undefined. +
@@ -2249,6 +2255,7 @@ of var1.
<result> = ashr i32 4, 2 ; yields {i32}:result = 1
<result> = ashr i8 4, 3 ; yields {i8}:result = 0
<result> = ashr i8 -2, 1 ; yields {i8}:result = -1
+ <result> = ashr i32 1, 32 ; undefined
@@ -4484,9 +4491,14 @@ this can be specified as the fourth argument, otherwise it should be set to 0 or
This is an overloaded intrinsic. You can use llvm.sqrt on any +floating point type. Not all targets support all types however.
- declare float @llvm.sqrt.f32(float %Val) - declare double @llvm.sqrt.f64(double %Val) + declare float @llvm.sqrt.f32(float %Val) + declare double @llvm.sqrt.f64(double %Val) + declare x86_fp80 @llvm.sqrt.f80(x86_fp80 %Val) + declare fp128 @llvm.sqrt.f128(fp128 %Val) + declare ppc_fp128 @llvm.sqrt.ppcf128(ppc_fp128 %Val)
This is an overloaded intrinsic. You can use llvm.powi on any +floating point type. Not all targets support all types however.
- declare float @llvm.powi.f32(float %Val, i32 %power) - declare double @llvm.powi.f64(double %Val, i32 %power) + declare float @llvm.powi.f32(float %Val, i32 %power) + declare double @llvm.powi.f64(double %Val, i32 %power) + declare x86_fp80 @llvm.powi.f80(x86_fp80 %Val, i32 %power) + declare fp128 @llvm.powi.f128(fp128 %Val, i32 %power) + declare ppc_fp128 @llvm.powi.ppcf128(ppc_fp128 %Val, i32 %power)
- These intrinsic functions expand the "universal IR" of LLVM to represent - hardware constructs for atomic operations and memory synchronization. This - provides an interface to the hardware, not an interface to the programmer. It - is aimed at a low enough level to allow any programming models or APIs which - need atomic behaviors to map cleanly onto it. It is also modeled primarily on - hardware behavior. Just as hardware provides a "universal IR" for source - languages, it also provides a starting point for developing a "universal" - atomic operation and synchronization IR. -
-- These do not form an API such as high-level threading libraries, - software transaction memory systems, atomic primitives, and intrinsic - functions as found in BSD, GNU libc, atomic_ops, APR, and other system and - application libraries. The hardware interface provided by LLVM should allow - a clean implementation of all of these APIs and parallel programming models. - No one model or paradigm should be selected above others unless the hardware - itself ubiquitously does so. -
-- This is an overloaded intrinsic. You can use llvm.atomic.lcs on any - integer bit width. Not all targets support all bit widths however.
--declare i8 @llvm.atomic.lcs.i8.i8p.i8.i8( i8* <ptr>, i8 <cmp>, i8 <val> ) -declare i16 @llvm.atomic.lcs.i16.i16p.i16.i16( i16* <ptr>, i16 <cmp>, i16 <val> ) -declare i32 @llvm.atomic.lcs.i32.i32p.i32.i32( i32* <ptr>, i32 <cmp>, i32 <val> ) -declare i64 @llvm.atomic.lcs.i64.i64p.i64.i64( i64* <ptr>, i64 <cmp>, i64 <val> ) --
- This loads a value in memory and compares it to a given value. If they are - equal, it stores a new value into the memory. -
-- The llvm.atomic.lcs intrinsic takes three arguments. The result as - well as both cmp and val must be integer values with the - same bit width. The ptr argument must be a pointer to a value of - this integer type. While any bit width integer may be used, targets may only - lower representations they support in hardware. -
-- This entire intrinsic must be executed atomically. It first loads the value - in memory pointed to by ptr and compares it with the value - cmp. If they are equal, val is stored into the memory. The - loaded value is yielded in all cases. This provides the equivalent of an - atomic compare-and-swap operation within the SSA framework. -
-
-%ptr = malloc i32
- store i32 4, %ptr
-
-%val1 = add i32 4, 4
-%result1 = call i32 @llvm.atomic.lcs( i32* %ptr, i32 4, %val1 )
- ; yields {i32}:result1 = 4
-%stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true
-%memval1 = load i32* %ptr ; yields {i32}:memval1 = 8
-
-%val2 = add i32 1, 1
-%result2 = call i32 @llvm.atomic.lcs( i32* %ptr, i32 5, %val2 )
- ; yields {i32}:result2 = 8
-%stored2 = icmp eq i32 %result2, 5 ; yields {i1}:stored2 = false
-%memval2 = load i32* %ptr ; yields {i32}:memval2 = 8
-
-- This is an overloaded intrinsic. You can use llvm.atomic.ls on any - integer bit width. Not all targets support all bit widths however.
--declare i8 @llvm.atomic.ls.i8.i8p.i8( i8* <ptr>, i8 <val> ) -declare i16 @llvm.atomic.ls.i16.i16p.i16( i16* <ptr>, i16 <val> ) -declare i32 @llvm.atomic.ls.i32.i32p.i32( i32* <ptr>, i32 <val> ) -declare i64 @llvm.atomic.ls.i64.i64p.i64( i64* <ptr>, i64 <val> ) --
- This intrinsic loads the value stored in memory at ptr and yields - the value from memory. It then stores the value in val in the memory - at ptr. -
-- The llvm.atomic.ls intrinsic takes two arguments. Both the - val argument and the result must be integers of the same bit width. - The first argument, ptr, must be a pointer to a value of this - integer type. The targets may only lower integer representations they - support. -
-- This intrinsic loads the value pointed to by ptr, yields it, and - stores val back into ptr atomically. This provides the - equivalent of an atomic swap operation within the SSA framework. -
-
-%ptr = malloc i32
- store i32 4, %ptr
-
-%val1 = add i32 4, 4
-%result1 = call i32 @llvm.atomic.ls( i32* %ptr, i32 %val1 )
- ; yields {i32}:result1 = 4
-%stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true
-%memval1 = load i32* %ptr ; yields {i32}:memval1 = 8
-
-%val2 = add i32 1, 1
-%result2 = call i32 @llvm.atomic.ls( i32* %ptr, i32 %val2 )
- ; yields {i32}:result2 = 8
-%stored2 = icmp eq i32 %result2, 8 ; yields {i1}:stored2 = true
-%memval2 = load i32* %ptr ; yields {i32}:memval2 = 2
-
- - This is an overloaded intrinsic. You can use llvm.atomic.las on any - integer bit width. Not all targets support all bit widths however.
--declare i8 @llvm.atomic.las.i8.i8p.i8( i8* <ptr>, i8 <delta> ) -declare i16 @llvm.atomic.las.i16.i16p.i16( i16* <ptr>, i16 <delta> ) -declare i32 @llvm.atomic.las.i32.i32p.i32( i32* <ptr>, i32 <delta> ) -declare i64 @llvm.atomic.las.i64.i64p.i64( i64* <ptr>, i64 <delta> ) --
- This intrinsic adds delta to the value stored in memory at - ptr. It yields the original value at ptr. -
-- The intrinsic takes two arguments, the first a pointer to an integer value - and the second an integer value. The result is also an integer value. These - integer types can have any bit width, but they must all have the same bit - width. The targets may only lower integer representations they support. -
-- This intrinsic does a series of operations atomically. It first loads the - value stored at ptr. It then adds delta, stores the result - to ptr. It yields the original value stored at ptr. -
-
-%ptr = malloc i32
- store i32 4, %ptr
-%result1 = call i32 @llvm.atomic.las( i32* %ptr, i32 4 )
- ; yields {i32}:result1 = 4
-%result2 = call i32 @llvm.atomic.las( i32* %ptr, i32 2 )
- ; yields {i32}:result2 = 8
-%result3 = call i32 @llvm.atomic.las( i32* %ptr, i32 5 )
- ; yields {i32}:result3 = 10
-%memval = load i32* %ptr ; yields {i32}:memval1 = 15
-
-- This is an overloaded intrinsic. You can use llvm.atomic.lss on any - integer bit width. Not all targets support all bit widths however.
--declare i8 @llvm.atomic.lss.i8.i8.i8( i8* <ptr>, i8 <delta> ) -declare i16 @llvm.atomic.lss.i16.i16.i16( i16* <ptr>, i16 <delta> ) -declare i32 @llvm.atomic.lss.i32.i32.i32( i32* <ptr>, i32 <delta> ) -declare i64 @llvm.atomic.lss.i64.i64.i64( i64* <ptr>, i64 <delta> ) --
- This intrinsic subtracts delta from the value stored in memory at - ptr. It yields the original value at ptr. -
-- The intrinsic takes two arguments, the first a pointer to an integer value - and the second an integer value. The result is also an integer value. These - integer types can have any bit width, but they must all have the same bit - width. The targets may only lower integer representations they support. -
-- This intrinsic does a series of operations atomically. It first loads the - value stored at ptr. It then subtracts delta, - stores the result to ptr. It yields the original value stored - at ptr. -
-
-%ptr = malloc i32
- store i32 32, %ptr
-%result1 = call i32 @llvm.atomic.lss( i32* %ptr, i32 4 )
- ; yields {i32}:result1 = 32
-%result2 = call i32 @llvm.atomic.lss( i32* %ptr, i32 2 )
- ; yields {i32}:result2 = 28
-%result3 = call i32 @llvm.atomic.lss( i32* %ptr, i32 5 )
- ; yields {i32}:result3 = 26
-%memval = load i32* %ptr ; yields {i32}:memval1 = 21
-
--declare void @llvm.memory.barrier( i1 <ll>, i1 <ls>, i1 <sl>, i1 <ss> ) --
- The llvm.memory.barrier intrinsic guarantees ordering between - specific pairs of memory access types. -
-- The llvm.memory.barrier intrinsic requires four boolean arguments. - Each argument enables a specific barrier as listed below. -
-- This intrinsic causes the system to enforce some ordering constraints upon - the loads and stores of the program. This barrier does not indicate - when any events will occur, it only enforces an order in - which they occur. For any of the specified pairs of load and store operations - (f.ex. load-load, or store-load), all of the first operations preceding the - barrier will complete before any of the second operations succeeding the - barrier begin. Specifically the semantics for each pairing is as follows: -
-- These semantics are applied with a logical "and" behavior when more than one - is enabled in a single memory barrier intrinsic. -
-
-%ptr = malloc i32
- store i32 4, %ptr
-
-%result1 = load i32* %ptr ; yields {i32}:result1 = 4
- call void @llvm.memory.barrier( i1 false, i1 true, i1 false, i1 false )
- ; guarantee the above finishes
- store i32 8, %ptr ; before this begins
-
-For example, if the function is i32 f(i8* nest %c, i32 %x, i32 %y) then the resulting function - pointer has signature i32 (i32, i32)*. It can be created as follows: + pointer has signature i32 (i32, i32)*. It can be created as follows:
%tramp = alloca [10 x i8], align 4 ; size and alignment only correct for X86 %tramp1 = getelementptr [10 x i8]* %tramp, i32 0, i32 0 %p = call i8* @llvm.init.trampoline( i8* %tramp1, i8* bitcast (i32 (i8* nest , i32, i32)* @f to i8*), i8* %nval ) %fp = bitcast i8* %p to i32 (i32, i32)*- The call %val = call i32 %fp( i32 %x, i32 %y ) is then equivalent to - %val = call i32 %f( i8* %nval, i32 %x, i32 %y ). - +
The call %val = call i32 %fp( i32 %x, i32 %y ) is then equivalent + to %val = call i32 %f( i8* %nval, i32 %x, i32 %y ).