X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=docs%2FExtendingLLVM.html;h=99e209b89403027305729cee2082bdeeb0bad93c;hb=908a831a9a1fb043bc4758d6712d78255099ae51;hp=606bada127c04c63ed1deb1ab3883a86c56f32f2;hpb=fe732854bac9b15e311627c58e50848751205b04;p=oota-llvm.git diff --git a/docs/ExtendingLLVM.html b/docs/ExtendingLLVM.html index 606bada127c..99e209b8940 100644 --- a/docs/ExtendingLLVM.html +++ b/docs/ExtendingLLVM.html @@ -2,20 +2,22 @@ "http://www.w3.org/TR/html4/strict.dtd"> + Extending LLVM: Adding instructions, intrinsics, types, etc. - + -
+

Extending LLVM: Adding instructions, intrinsics, types, etc. -

+
  1. Introduction and Warning
  2. Adding a new intrinsic function
  3. Adding a new instruction
  4. +
  5. Adding a new SelectionDAG node
  6. Adding a new type
    1. Adding a new fundamental type
    2. @@ -24,16 +26,18 @@
    -

    Written by Misha Brukman

    +

    Written by Misha Brukman, + Brad Jones, Nate Begeman, + and Chris Lattner

    - + -
    +

    During the course of using LLVM, you may wish to customize it for your research project or for experimentation. At this point, you may realize that @@ -50,9 +54,9 @@ different passes that you intend to use with your extension, and there are many LLVM analyses and transformations, so it may be quite a bit of work.

    -

    Adding an intrinsic function is easier than adding -an instruction, and is transparent to optimization passes which treat it as an -unanalyzable function. If your added functionality can be expressed as a +

    Adding an intrinsic function is far easier than +adding an instruction, and is transparent to optimization passes. If your added +functionality can be expressed as a function call, an intrinsic function is the method of choice for LLVM extension.

    @@ -65,12 +69,12 @@ effort by doing so.

    - + -
    +

    Adding a new intrinsic function to LLVM is much easier than adding a new instruction. Almost all extensions to LLVM should start as an intrinsic @@ -82,45 +86,136 @@ function and then be turned into an instruction if warranted.

    what the restrictions are. Talk to other people about it so that you are sure it's a good idea.
  7. -
  8. llvm/include/llvm/Intrinsics.h: - add an enum in the llvm::Intrinsic namespace
  9. +
  10. llvm/include/llvm/Intrinsics*.td: + Add an entry for your intrinsic. Describe its memory access characteristics + for optimization (this controls whether it will be DCE'd, CSE'd, etc). Note + that any intrinsic using the llvm_int_ty type for an argument will + be deemed by tblgen as overloaded and the corresponding suffix + will be required on the intrinsic's name.
  11. -
  12. llvm/lib/CodeGen/IntrinsicLowering.cpp: - implement the lowering for this intrinsic
  13. +
  14. llvm/lib/Analysis/ConstantFolding.cpp: If it is possible to + constant fold your intrinsic, add support to it in the + canConstantFoldCallTo and ConstantFoldCall functions.
  15. -
  16. llvm/lib/VMCore/Verifier.cpp: - Add code to check the invariants of the intrinsic are respected.
  17. +
  18. llvm/test/Regression/*: Add test cases for your test cases to the + test suite
  19. +
-
  • llvm/lib/VMCore/Function.cpp (Function::getIntrinsicID()): - Identify the new intrinsic function, returning the enum for the intrinsic - that you added.
  • +

    Once the intrinsic has been added to the system, you must add code generator +support for it. Generally you must do the following steps:

    -
  • llvm/lib/Analysis/BasicAliasAnalysis.cpp: If the new intrinsic does - not access memory or does not write to memory, add it to the relevant list - of functions.
  • +
    -
  • llvm/lib/Transforms/Utils/Local.cpp: If it is possible to constant - propagate your intrinsic, add support to it in the - canConstantFoldCallTo and ConstantFoldCall functions.
  • +
    Add support to the .td file for the target(s) of your choice in + lib/Target/*/*.td.
    -
  • Test your intrinsic
  • -
  • llvm/test/Regression/*: add your test cases to the test suite.
  • - +
    This is usually a matter of adding a pattern to the .td file that matches + the intrinsic, though it may obviously require adding the instructions you + want to generate as well. There are lots of examples in the PowerPC and X86 + backend to follow.
    +
    -

    If this intrinsic requires code generator support (ie, it cannot be lowered). -You should also add support to the code generator in question.

    + + + +

    + Adding a new SelectionDAG node +

    + + +
    + +

    As with intrinsics, adding a new SelectionDAG node to LLVM is much easier +than adding a new instruction. New nodes are often added to help represent +instructions common to many targets. These nodes often map to an LLVM +instruction (add, sub) or intrinsic (byteswap, population count). In other +cases, new nodes have been added to allow many targets to perform a common task +(converting between floating point and integer representation) or capture more +complicated behavior in a single node (rotate).

    + +
      +
    1. include/llvm/CodeGen/ISDOpcodes.h: + Add an enum value for the new SelectionDAG node.
    2. +
    3. lib/CodeGen/SelectionDAG/SelectionDAG.cpp: + Add code to print the node to getOperationName. If your new node + can be evaluated at compile time when given constant arguments (such as an + add of a constant with another constant), find the getNode method + that takes the appropriate number of arguments, and add a case for your node + to the switch statement that performs constant folding for nodes that take + the same number of arguments as your new node.
    4. +
    5. lib/CodeGen/SelectionDAG/LegalizeDAG.cpp: + Add code to legalize, + promote, and expand the node as necessary. At a minimum, you will need + to add a case statement for your node in LegalizeOp which calls + LegalizeOp on the node's operands, and returns a new node if any of the + operands changed as a result of being legalized. It is likely that not all + targets supported by the SelectionDAG framework will natively support the + new node. In this case, you must also add code in your node's case + statement in LegalizeOp to Expand your node into simpler, legal + operations. The case for ISD::UREM for expanding a remainder into + a divide, multiply, and a subtract is a good example.
    6. +
    7. lib/CodeGen/SelectionDAG/LegalizeDAG.cpp: + If targets may support the new node being added only at certain sizes, you + will also need to add code to your node's case statement in + LegalizeOp to Promote your node's operands to a larger size, and + perform the correct operation. You will also need to add code to + PromoteOp to do this as well. For a good example, see + ISD::BSWAP, + which promotes its operand to a wider size, performs the byteswap, and then + shifts the correct bytes right to emulate the narrower byteswap in the + wider type.
    8. +
    9. lib/CodeGen/SelectionDAG/LegalizeDAG.cpp: + Add a case for your node in ExpandOp to teach the legalizer how to + perform the action represented by the new node on a value that has been + split into high and low halves. This case will be used to support your + node with a 64 bit operand on a 32 bit target.
    10. +
    11. lib/CodeGen/SelectionDAG/DAGCombiner.cpp: + If your node can be combined with itself, or other existing nodes in a + peephole-like fashion, add a visit function for it, and call that function + from . There are several good examples for simple combines you + can do; visitFABS and visitSRL are good starting places. +
    12. +
    13. lib/Target/PowerPC/PPCISelLowering.cpp: + Each target has an implementation of the TargetLowering class, + usually in its own file (although some targets include it in the same + file as the DAGToDAGISel). The default behavior for a target is to + assume that your new node is legal for all types that are legal for + that target. If this target does not natively support your node, then + tell the target to either Promote it (if it is supported at a larger + type) or Expand it. This will cause the code you wrote in + LegalizeOp above to decompose your new node into other legal + nodes for this target.
    14. +
    15. lib/Target/TargetSelectionDAG.td: + Most current targets supported by LLVM generate code using the DAGToDAG + method, where SelectionDAG nodes are pattern matched to target-specific + nodes, which represent individual instructions. In order for the targets + to match an instruction to your new node, you must add a def for that node + to the list in this file, with the appropriate type constraints. Look at + add, bswap, and fadd for examples.
    16. +
    17. lib/Target/PowerPC/PPCInstrInfo.td: + Each target has a tablegen file that describes the target's instruction + set. For targets that use the DAGToDAG instruction selection framework, + add a pattern for your new node that uses one or more target nodes. + Documentation for this is a bit sparse right now, but there are several + decent examples. See the patterns for rotl in + PPCInstrInfo.td.
    18. +
    19. TODO: document complex patterns.
    20. +
    21. llvm/test/Regression/CodeGen/*: Add test cases for your new node + to the test suite. llvm/test/Regression/CodeGen/X86/bswap.ll is + a good example.
    22. +
    -
    +

    Adding a new instruction -

    + -
    +
    -

    WARNING: adding instructions changes the bytecode +

    WARNING: adding instructions changes the bitcode format, and it will take some effort to maintain compatibility with the previous version. Only add an instruction if it is absolutely necessary.

    @@ -143,14 +238,23 @@ necessary.

    add the grammar on how your instruction can be read and what it will construct as a result -
  • llvm/lib/Bytecode/Reader/InstructionReader.cpp: - add a case for your instruction and how it will be parsed from bytecode
  • +
  • llvm/lib/Bitcode/Reader/Reader.cpp: + add a case for your instruction and how it will be parsed from bitcode
  • llvm/lib/VMCore/Instruction.cpp: add a case for how your instruction will be printed out to assembly
  • llvm/lib/VMCore/Instructions.cpp: - implement the class you defined in llvm/include/llvm/Instructions.h
  • + implement the class you defined in + llvm/include/llvm/Instructions.h + +
  • Test your instruction
  • + +
  • llvm/lib/Target/*: + Add support for your instruction to code generators, or add a lowering + pass.
  • + +
  • llvm/test/Regression/*: add your test cases to the test suite.
  • @@ -161,33 +265,28 @@ to understand this new instruction.

    - + -
    +
    -

    WARNING: adding new types changes the bytecode +

    WARNING: adding new types changes the bitcode format, and will break compatibility with currently-existing LLVM installations. Only add new types if it is absolutely necessary.

    -
    - - + -
    +
      -
    1. llvm/include/llvm/Type.def: - add enum for the type
    2. -
    3. llvm/include/llvm/Type.h: - add ID number for the new type; add static Type* for this type
    4. + add enum for the new type; add static Type* for this type
    5. llvm/lib/VMCore/Type.cpp: add mapping from TypeID => Type*; @@ -204,21 +303,18 @@ installations. Only add new types if it is absolutely necessary.

    - + -
    +
      -
    1. llvm/include/llvm/Type.def: - add enum for the type
    2. -
    3. llvm/include/llvm/Type.h: - add ID number for the new type; add a forward declaration of the type + add enum for the new type; add a forward declaration of the type also
    4. -
    5. llvm/include/llvm/DerivedType.h: +
    6. llvm/include/llvm/DerivedTypes.h: add new class to represent new class in the hierarchy; add forward declaration to the TypeMap value type
    7. @@ -237,12 +333,12 @@ bool TypesEqual(const Type *Ty, const Type *Ty2,
    8. llvm/lib/AsmReader/Lexer.l: add ability to parse in the type from text assembly
    9. -
    10. llvm/lib/ByteCode/Writer/Writer.cpp: - modify void BytecodeWriter::outputType(const Type *T) to serialize +
    11. llvm/lib/BitCode/Writer/Writer.cpp: + modify void BitcodeWriter::outputType(const Type *T) to serialize your type
    12. -
    13. llvm/lib/ByteCode/Reader/Reader.cpp: - modify const Type *BytecodeReader::ParseType() to read your data +
    14. llvm/lib/BitCode/Reader/Reader.cpp: + modify const Type *BitcodeReader::ParseType() to read your data type
    15. llvm/lib/VMCore/AsmWriter.cpp: @@ -263,17 +359,18 @@ void calcTypeName(const Type *Ty,
    +
    +
    Valid CSS! + src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"> Valid HTML 4.01! + src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"> - Misha Brukman
    - The LLVM Compiler Infrastructure + The LLVM Compiler Infrastructure
    Last modified: $Date$