X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=cds%2Furcu%2Fdetails%2Fsh.h;h=682c3ee9887673ee1205acd84d7344096fa9f2a8;hb=2bb66f1d159d044d2c5dad0f0f968abcb6d53287;hp=4e752f8e08b53028b3cfb382887d9126efbee0c4;hpb=7d15399a4d18ae2061ddb01656d85dbc940ff915;p=libcds.git

diff --git a/cds/urcu/details/sh.h b/cds/urcu/details/sh.h
index 4e752f8e..682c3ee9 100644
--- a/cds/urcu/details/sh.h
+++ b/cds/urcu/details/sh.h
@@ -1,8 +1,37 @@
-//$$CDS-header$$
+/*
+    This file is a part of libcds - Concurrent Data Structures library
 
-#ifndef _CDS_URCU_DETAILS_SH_H
-#define _CDS_URCU_DETAILS_SH_H
+    (C) Copyright Maxim Khizhinsky (libcds.dev@gmail.com) 2006-2017
 
+    Source code repo: http://github.com/khizmax/libcds/
+    Download: http://sourceforge.net/projects/libcds/files/
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright notice, this
+      list of conditions and the following disclaimer.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimer in the documentation
+      and/or other materials provided with the distribution.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+    DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+    FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+    DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+    CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+    OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef CDSLIB_URCU_DETAILS_SH_H
+#define CDSLIB_URCU_DETAILS_SH_H
+
+#include <memory.h> //memset
 #include <cds/urcu/details/sh_decl.h>
 
 #ifdef CDS_URCU_SIGNAL_HANDLING_ENABLED
@@ -17,7 +46,7 @@ namespace cds { namespace urcu { namespace details {
     template <typename RCUtag>
     inline sh_thread_gc<RCUtag>::sh_thread_gc()
     {
-        if ( !threading::Manager::isThreadAttached() )
+        if ( !threading::Manager::isThreadAttached())
             cds::threading::Manager::attachThread();
     }
 
@@ -37,17 +66,17 @@ namespace cds { namespace urcu { namespace details {
     inline void sh_thread_gc<RCUtag>::access_lock()
     {
         thread_record * pRec = get_thread_record();
-        assert( pRec != null_ptr<thread_record *>());
+        assert( pRec != nullptr );
 
-        uint32_t tmp = pRec->m_nAccessControl.load( CDS_ATOMIC::memory_order_relaxed );
+        uint32_t tmp = pRec->m_nAccessControl.load( atomics::memory_order_relaxed );
         if ( (tmp & rcu_class::c_nNestMask) == 0 ) {
             pRec->m_nAccessControl.store(
-                sh_singleton<RCUtag>::instance()->global_control_word(CDS_ATOMIC::memory_order_acquire),
-                CDS_ATOMIC::memory_order_release
+                sh_singleton<RCUtag>::instance()->global_control_word(atomics::memory_order_acquire),
+                atomics::memory_order_release
             );
         }
         else {
-            pRec->m_nAccessControl.fetch_add( 1, CDS_ATOMIC::memory_order_release );
+            pRec->m_nAccessControl.fetch_add( 1, atomics::memory_order_release );
         }
         CDS_COMPILER_RW_BARRIER;
     }
@@ -56,19 +85,19 @@ namespace cds { namespace urcu { namespace details {
     inline void sh_thread_gc<RCUtag>::access_unlock()
     {
         thread_record * pRec = get_thread_record();
-        assert( pRec != null_ptr<thread_record *>());
+        assert( pRec != nullptr);
 
         CDS_COMPILER_RW_BARRIER;
-        pRec->m_nAccessControl.fetch_sub( 1, CDS_ATOMIC::memory_order_release );
+        pRec->m_nAccessControl.fetch_sub( 1, atomics::memory_order_release );
     }
 
     template <typename RCUtag>
     inline bool sh_thread_gc<RCUtag>::is_locked()
     {
         thread_record * pRec = get_thread_record();
-        assert( pRec != null_ptr<thread_record *>());
+        assert( pRec != nullptr);
 
-        return (pRec->m_nAccessControl.load( CDS_ATOMIC::memory_order_relaxed ) & rcu_class::c_nNestMask) != 0;
+        return (pRec->m_nAccessControl.load( atomics::memory_order_relaxed ) & rcu_class::c_nNestMask) != 0;
     }
 
 
@@ -83,10 +112,10 @@ namespace cds { namespace urcu { namespace details {
         sigact.sa_flags = SA_SIGINFO;
         sigemptyset( &sigact.sa_mask );
         //sigaddset( &sigact.sa_mask, m_nSigNo );
-        sigaction( m_nSigNo, &sigact, null_ptr<struct sigaction *>() );
+        sigaction( m_nSigNo, &sigact, nullptr );
 
         sigaddset( &sigact.sa_mask, m_nSigNo );
-        pthread_sigmask( SIG_UNBLOCK, &sigact.sa_mask, NULL );
+        pthread_sigmask( SIG_UNBLOCK, &sigact.sa_mask, nullptr );
     }
 
     template <typename RCUtag>
@@ -94,13 +123,13 @@ namespace cds { namespace urcu { namespace details {
     {}
 
     template <typename RCUtag>
-    void sh_singleton<RCUtag>::signal_handler( int signo, siginfo_t * sigInfo, void * context )
+    void sh_singleton<RCUtag>::signal_handler( int /*signo*/, siginfo_t * /*sigInfo*/, void * /*context*/ )
     {
         thread_record * pRec = cds::threading::getRCU<RCUtag>();
         if ( pRec ) {
-            CDS_ATOMIC::atomic_signal_fence( CDS_ATOMIC::memory_order_acquire );
-            pRec->m_bNeedMemBar.store( false, CDS_ATOMIC::memory_order_relaxed );
-            CDS_ATOMIC::atomic_signal_fence( CDS_ATOMIC::memory_order_release );
+            atomics::atomic_signal_fence( atomics::memory_order_acquire );
+            pRec->m_bNeedMemBar.store( false, atomics::memory_order_relaxed );
+            atomics::atomic_signal_fence( atomics::memory_order_release );
         }
     }
 
@@ -114,24 +143,24 @@ namespace cds { namespace urcu { namespace details {
     template <class Backoff>
     inline void sh_singleton<RCUtag>::force_membar_all_threads( Backoff& bkOff )
     {
-        OS::ThreadId const nullThreadId = OS::nullThreadId();
+        OS::ThreadId const nullThreadId = OS::c_NullThreadId;
 
         // Send "need membar" signal to all RCU threads
-        for ( thread_record * pRec = m_ThreadList.head( CDS_ATOMIC::memory_order_acquire); pRec; pRec = pRec->m_list.m_pNext ) {
-            OS::ThreadId tid = pRec->m_list.m_idOwner.load( CDS_ATOMIC::memory_order_acquire);
+        for ( thread_record * pRec = m_ThreadList.head( atomics::memory_order_acquire); pRec; pRec = pRec->m_list.m_pNext ) {
+            OS::ThreadId tid = pRec->m_list.m_idOwner.load( atomics::memory_order_acquire);
             if ( tid != nullThreadId ) {
-                pRec->m_bNeedMemBar.store( true, CDS_ATOMIC::memory_order_release );
+                pRec->m_bNeedMemBar.store( true, atomics::memory_order_release );
                 raise_signal( tid );
             }
         }
 
         // Wait while all RCU threads process the signal
-        for ( thread_record * pRec = m_ThreadList.head( CDS_ATOMIC::memory_order_acquire); pRec; pRec = pRec->m_list.m_pNext ) {
-            OS::ThreadId tid = pRec->m_list.m_idOwner.load( CDS_ATOMIC::memory_order_acquire);
+        for ( thread_record * pRec = m_ThreadList.head( atomics::memory_order_acquire); pRec; pRec = pRec->m_list.m_pNext ) {
+            OS::ThreadId tid = pRec->m_list.m_idOwner.load( atomics::memory_order_acquire);
             if ( tid != nullThreadId ) {
                 bkOff.reset();
-                while ( (tid = pRec->m_list.m_idOwner.load( CDS_ATOMIC::memory_order_acquire )) != nullThreadId
-                     && pRec->m_bNeedMemBar.load( CDS_ATOMIC::memory_order_acquire ))
+                while ( (tid = pRec->m_list.m_idOwner.load( atomics::memory_order_acquire )) != nullThreadId
+                     && pRec->m_bNeedMemBar.load( atomics::memory_order_acquire ))
                 {
                     // Some versions of OSes can lose signals
                     // So, we resend the signal
@@ -145,19 +174,19 @@ namespace cds { namespace urcu { namespace details {
     template <typename RCUtag>
     bool sh_singleton<RCUtag>::check_grace_period( thread_record * pRec ) const
     {
-        uint32_t const v = pRec->m_nAccessControl.load( CDS_ATOMIC::memory_order_acquire );
+        uint32_t const v = pRec->m_nAccessControl.load( atomics::memory_order_acquire );
         return (v & signal_handling_rcu::c_nNestMask)
-            && ((( v ^ m_nGlobalControl.load( CDS_ATOMIC::memory_order_relaxed )) & ~signal_handling_rcu::c_nNestMask ));
+            && ((( v ^ m_nGlobalControl.load( atomics::memory_order_relaxed )) & ~signal_handling_rcu::c_nNestMask ));
     }
 
     template <typename RCUtag>
     template <class Backoff>
     void sh_singleton<RCUtag>::wait_for_quiescent_state( Backoff& bkOff )
     {
-        OS::ThreadId const nullThreadId = OS::nullThreadId();
+        OS::ThreadId const nullThreadId = OS::c_NullThreadId;
 
-        for ( thread_record * pRec = m_ThreadList.head( CDS_ATOMIC::memory_order_acquire); pRec; pRec = pRec->m_list.m_pNext ) {
-            while ( pRec->m_list.m_idOwner.load( CDS_ATOMIC::memory_order_acquire) != nullThreadId && check_grace_period( pRec ))
+        for ( thread_record * pRec = m_ThreadList.head( atomics::memory_order_acquire); pRec; pRec = pRec->m_list.m_pNext ) {
+            while ( pRec->m_list.m_idOwner.load( atomics::memory_order_acquire) != nullThreadId && check_grace_period( pRec ))
                 bkOff();
         }
     }
@@ -166,4 +195,4 @@ namespace cds { namespace urcu { namespace details {
 //@endcond
 
 #endif // #ifdef CDS_URCU_SIGNAL_HANDLING_ENABLED
-#endif // #ifndef _CDS_URCU_DETAILS_SH_H
+#endif // #ifndef CDSLIB_URCU_DETAILS_SH_H