X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=arch%2Farm64%2Fboot%2Fdts%2Frockchip%2Frk3399.dtsi;h=9a4374a4dccb8c37feeacdaec3ea8c08c9aa10c9;hb=a4a3659d9cdb587367a48def364c1be7f9fb6d43;hp=6ce3dccc825f5d1273404c26d11679708759c506;hpb=05b51628345e3af46f36994bd513a0ffeef5de82;p=firefly-linux-kernel-4.4.55.git diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 6ce3dccc825f..9a4374a4dccb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -114,7 +114,7 @@ reg = <0x0 0x0>; enable-method = "psci"; #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <121>; + dynamic-power-coefficient = <100>; clocks = <&cru ARMCLKL>; cpu-idle-states = <&cpu_sleep>; operating-points-v2 = <&cluster0_opp>; @@ -160,7 +160,7 @@ reg = <0x0 0x100>; enable-method = "psci"; #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <1068>; + dynamic-power-coefficient = <436>; clocks = <&cru ARMCLKB>; cpu-idle-states = <&cpu_sleep>; operating-points-v2 = <&cluster1_opp>; @@ -254,15 +254,20 @@ timer { compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; }; - arm-pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = ; + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + pmu_a72 { + compatible = "arm,cortex-a72-pmu"; + interrupts = ; }; xin24m: xin24m { @@ -281,8 +286,8 @@ dmac_bus: dma-controller@ff6d0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xff6d0000 0x0 0x4000>; - interrupts = , - ; + interrupts = , + ; #dma-cells = <1>; clocks = <&cru ACLK_DMAC0_PERILP>; clock-names = "apb_pclk"; @@ -292,8 +297,8 @@ dmac_peri: dma-controller@ff6e0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xff6e0000 0x0 0x4000>; - interrupts = , - ; + interrupts = , + ; #dma-cells = <1>; clocks = <&cru ACLK_DMAC1_PERILP>; clock-names = "apb_pclk"; @@ -305,7 +310,7 @@ compatible = "rockchip,rk3399-gmac"; reg = <0x0 0xfe300000 0x0 0x10000>; rockchip,grf = <&grf>; - interrupts = ; + interrupts = ; interrupt-names = "macirq"; clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, <&cru SCLK_MACREF>, @@ -333,7 +338,7 @@ compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe310000 0x0 0x4000>; - interrupts = ; + interrupts = ; clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; @@ -346,7 +351,7 @@ compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe320000 0x0 0x4000>; - interrupts = ; + interrupts = ; clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; @@ -358,7 +363,7 @@ sdhci: sdhci@fe330000 { compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; reg = <0x0 0xfe330000 0x0 0x10000>; - interrupts = ; + interrupts = ; clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; clock-names = "clk_xin", "clk_ahb"; assigned-clocks = <&cru SCLK_EMMC>; @@ -372,9 +377,10 @@ usb_host0_ehci: usb@fe380000 { compatible = "generic-ehci"; reg = <0x0 0xfe380000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>; - clock-names = "hclk_host0", "hclk_host0_arb"; + interrupts = ; + clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, + <&cru SCLK_USBPHY0_480M_SRC>; + clock-names = "hclk_host0", "hclk_host0_arb", "usbphy0_480m"; phys = <&u2phy0_host>; phy-names = "usb"; status = "disabled"; @@ -383,18 +389,22 @@ usb_host0_ohci: usb@fe3a0000 { compatible = "generic-ohci"; reg = <0x0 0xfe3a0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>; - clock-names = "hclk_host0", "hclk_host0_arb"; + interrupts = ; + clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, + <&cru SCLK_USBPHY0_480M_SRC>; + clock-names = "hclk_host0", "hclk_host0_arb", "usbphy0_480m"; + phys = <&u2phy0_host>; + phy-names = "usb"; status = "disabled"; }; usb_host1_ehci: usb@fe3c0000 { compatible = "generic-ehci"; reg = <0x0 0xfe3c0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>; - clock-names = "hclk_host1", "hclk_host1_arb"; + interrupts = ; + clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>, + <&cru SCLK_USBPHY1_480M_SRC>; + clock-names = "hclk_host1", "hclk_host1_arb", "usbphy1_480m"; phys = <&u2phy1_host>; phy-names = "usb"; status = "disabled"; @@ -403,9 +413,12 @@ usb_host1_ohci: usb@fe3e0000 { compatible = "generic-ohci"; reg = <0x0 0xfe3e0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>; - clock-names = "hclk_host1", "hclk_host1_arb"; + interrupts = ; + clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>, + <&cru SCLK_USBPHY1_480M_SRC>; + clock-names = "hclk_host1", "hclk_host1_arb", "usbphy1_480m"; + phys = <&u2phy1_host>; + phy-names = "usb"; status = "disabled"; }; @@ -424,8 +437,10 @@ usbdrd_dwc3_0: dwc3@fe800000 { compatible = "snps,dwc3"; reg = <0x0 0xfe800000 0x0 0x100000>; - interrupts = ; + interrupts = ; dr_mode = "otg"; + phys = <&u2phy0_otg>; + phy-names = "usb2-phy"; snps,dis_enblslpm_quirk; snps,phyif_utmi_16_bits; snps,dis_u2_freeclk_exists_quirk; @@ -450,8 +465,10 @@ usbdrd_dwc3_1: dwc3@fe900000 { compatible = "snps,dwc3"; reg = <0x0 0xfe900000 0x0 0x100000>; - interrupts = ; + interrupts = ; dr_mode = "otg"; + phys = <&u2phy1_otg>; + phy-names = "usb2-phy"; snps,dis_enblslpm_quirk; snps,phyif_utmi_16_bits; snps,dis_u2_freeclk_exists_quirk; @@ -463,7 +480,7 @@ gic: interrupt-controller@fee00000 { compatible = "arm,gic-v3"; - #interrupt-cells = <3>; + #interrupt-cells = <4>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -474,18 +491,28 @@ <0x0 0xfff00000 0 0x10000>, /* GICC */ <0x0 0xfff10000 0 0x10000>, /* GICH */ <0x0 0xfff20000 0 0x10000>; /* GICV */ - interrupts = ; + interrupts = ; its: interrupt-controller@fee20000 { compatible = "arm,gic-v3-its"; msi-controller; reg = <0x0 0xfee20000 0x0 0x20000>; }; + + ppi-partitions { + part0: interrupt-partition-0 { + affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>; + }; + + part1: interrupt-partition-1 { + affinity = <&cpu_b0 &cpu_b1>; + }; + }; }; saradc: saradc@ff100000 { compatible = "rockchip,rk3399-saradc"; reg = <0x0 0xff100000 0x0 0x100>; - interrupts = ; + interrupts = ; #io-channel-cells = <1>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; @@ -497,7 +524,7 @@ reg = <0x0 0xff3c0000 0x0 0x1000>; clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c0_xfer>; #address-cells = <1>; @@ -510,7 +537,7 @@ reg = <0x0 0xff110000 0x0 0x1000>; clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c1_xfer>; #address-cells = <1>; @@ -523,7 +550,7 @@ reg = <0x0 0xff120000 0x0 0x1000>; clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c2_xfer>; #address-cells = <1>; @@ -536,7 +563,7 @@ reg = <0x0 0xff130000 0x0 0x1000>; clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c3_xfer>; #address-cells = <1>; @@ -549,7 +576,7 @@ reg = <0x0 0xff140000 0x0 0x1000>; clocks = <&cru SCLK_I2C5>, <&cru PCLK_I2C5>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c5_xfer>; #address-cells = <1>; @@ -562,7 +589,7 @@ reg = <0x0 0xff150000 0x0 0x1000>; clocks = <&cru SCLK_I2C6>, <&cru PCLK_I2C6>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c6_xfer>; #address-cells = <1>; @@ -575,7 +602,7 @@ reg = <0x0 0xff160000 0x0 0x1000>; clocks = <&cru SCLK_I2C7>, <&cru PCLK_I2C7>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c7_xfer>; #address-cells = <1>; @@ -588,7 +615,7 @@ reg = <0x0 0xff180000 0x0 0x100>; clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; - interrupts = ; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; @@ -601,7 +628,7 @@ reg = <0x0 0xff190000 0x0 0x100>; clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; clock-names = "baudclk", "apb_pclk"; - interrupts = ; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; @@ -614,7 +641,7 @@ reg = <0x0 0xff1a0000 0x0 0x100>; clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; clock-names = "baudclk", "apb_pclk"; - interrupts = ; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; @@ -627,7 +654,7 @@ reg = <0x0 0xff1b0000 0x0 0x100>; clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; - interrupts = ; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; @@ -640,7 +667,7 @@ reg = <0x0 0xff1c0000 0x0 0x1000>; clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; clock-names = "spiclk", "apb_pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; #address-cells = <1>; @@ -653,7 +680,7 @@ reg = <0x0 0xff1d0000 0x0 0x1000>; clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; clock-names = "spiclk", "apb_pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; #address-cells = <1>; @@ -666,7 +693,7 @@ reg = <0x0 0xff1e0000 0x0 0x1000>; clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>; clock-names = "spiclk", "apb_pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>; #address-cells = <1>; @@ -679,7 +706,7 @@ reg = <0x0 0xff1f0000 0x0 0x1000>; clocks = <&cru SCLK_SPI4>, <&cru PCLK_SPI4>; clock-names = "spiclk", "apb_pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>; #address-cells = <1>; @@ -692,7 +719,7 @@ reg = <0x0 0xff200000 0x0 0x1000>; clocks = <&cru SCLK_SPI5>, <&cru PCLK_SPI5>; clock-names = "spiclk", "apb_pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>; #address-cells = <1>; @@ -704,7 +731,7 @@ soc_thermal: soc-thermal { polling-delay-passive = <20>; /* milliseconds */ polling-delay = <1000>; /* milliseconds */ - sustainable-power = <1600>; /* milliwatts */ + sustainable-power = <1000>; /* milliwatts */ thermal-sensors = <&tsadc 0>; @@ -731,7 +758,7 @@ trip = <&target>; cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - contribution = <10240>; + contribution = <4096>; }; map1 { trip = <&target>; @@ -743,7 +770,7 @@ trip = <&target>; cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - contribution = <10240>; + contribution = <4096>; }; }; }; @@ -759,7 +786,7 @@ tsadc: tsadc@ff260000 { compatible = "rockchip,rk3399-tsadc"; reg = <0x0 0xff260000 0x0 0x100>; - interrupts = ; + interrupts = ; rockchip,grf = <&grf>; clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; clock-names = "tsadc", "apb_pclk"; @@ -776,6 +803,51 @@ status = "disabled"; }; + qos_emmc: qos@ffa58000 { + compatible = "syscon"; + reg = <0x0 0xffa58000 0x0 0x20>; + }; + + qos_gmac: qos@ffa5c000 { + compatible = "syscon"; + reg = <0x0 0xffa5c000 0x0 0x20>; + }; + + qos_pcie: qos@ffa60080 { + compatible = "syscon"; + reg = <0x0 0xffa60080 0x0 0x20>; + }; + + qos_usb_host0: qos@ffa60100 { + compatible = "syscon"; + reg = <0x0 0xffa60100 0x0 0x20>; + }; + + qos_usb_host1: qos@ffa60180 { + compatible = "syscon"; + reg = <0x0 0xffa60180 0x0 0x20>; + }; + + qos_usb_otg0: qos@ffa70000 { + compatible = "syscon"; + reg = <0x0 0xffa70000 0x0 0x20>; + }; + + qos_usb_otg1: qos@ffa70080 { + compatible = "syscon"; + reg = <0x0 0xffa70080 0x0 0x20>; + }; + + qos_sd: qos@ffa74000 { + compatible = "syscon"; + reg = <0x0 0xffa74000 0x0 0x20>; + }; + + qos_sdioaudio: qos@ffa76000 { + compatible = "syscon"; + reg = <0x0 0xffa76000 0x0 0x20>; + }; + qos_hdcp: qos@ffa90000 { compatible = "syscon"; reg = <0x0 0xffa90000 0x0 0x20>; @@ -846,6 +918,11 @@ reg = <0x0 0xffad0000 0x0 0x20>; }; + qos_perihp: qos@ffad8080 { + compatible = "syscon"; + reg = <0x0 0xffad8080 0x0 0x20>; + }; + qos_gpu: qos@ffae0000 { compatible = "syscon"; reg = <0x0 0xffae0000 0x0 0x20>; @@ -904,6 +981,40 @@ }; /* These power domains are grouped by VD_LOGIC */ + pd_emmc@RK3399_PD_EMMC { + reg = ; + clocks = <&cru ACLK_EMMC>; + pm_qos = <&qos_emmc>; + }; + pd_gmac@RK3399_PD_GMAC { + reg = ; + clocks = <&cru ACLK_GMAC>; + pm_qos = <&qos_gmac>; + }; + pd_perihp@RK3399_PD_PERIHP { + reg = ; + clocks = <&cru ACLK_PERIHP>; + pm_qos = <&qos_perihp>, + <&qos_pcie>, + <&qos_usb_host0>, + <&qos_usb_host1>; + }; + pd_sd@RK3399_PD_SD { + reg = ; + clocks = <&cru HCLK_SDMMC>; + pm_qos = <&qos_sd>; + }; + pd_sdioaudio@RK3399_PD_SDIOAUDIO { + reg = ; + clocks = <&cru HCLK_SDIO>; + pm_qos = <&qos_sdioaudio>; + }; + pd_usb3@RK3399_PD_USB3 { + reg = ; + clocks = <&cru ACLK_USB3>; + pm_qos = <&qos_usb_otg0>, + <&qos_usb_otg1>; + }; pd_vio@RK3399_PD_VIO { reg = ; #address-cells = <1>; @@ -960,10 +1071,12 @@ reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x300>; + mode-bootloader = ; + mode-charge = ; + mode-fastboot = ; + mode-loader = ; mode-normal = ; mode-recovery = ; - mode-bootloader = ; - mode-loader = ; }; }; @@ -972,7 +1085,7 @@ reg = <0x0 0xff350000 0x0 0x1000>; clocks = <&pmucru SCLK_SPI3_PMU>, <&pmucru PCLK_SPI3_PMU>; clock-names = "spiclk", "apb_pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>; #address-cells = <1>; @@ -985,7 +1098,7 @@ reg = <0x0 0xff370000 0x0 0x100>; clocks = <&pmucru SCLK_UART4_PMU>, <&pmucru PCLK_UART4_PMU>; clock-names = "baudclk", "apb_pclk"; - interrupts = ; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; @@ -998,7 +1111,7 @@ reg = <0x0 0xff3d0000 0x0 0x1000>; clocks = <&pmucru SCLK_I2C4_PMU>, <&pmucru PCLK_I2C4_PMU>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c4_xfer>; #address-cells = <1>; @@ -1011,7 +1124,7 @@ reg = <0x0 0xff3e0000 0x0 0x1000>; clocks = <&pmucru SCLK_I2C8_PMU>, <&pmucru PCLK_I2C8_PMU>; clock-names = "i2c", "pclk"; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c8_xfer>; #address-cells = <1>; @@ -1028,9 +1141,9 @@ clock-names = "aclk_pcie", "aclk_perf_pcie", "hclk_pcie", "clk_pciephy_ref"; bus-range = <0x0 0x1>; - interrupts = , - , - ; + interrupts = , + , + ; interrupt-names = "pcie-sys", "pcie-legacy", "pcie-client"; ranges = < 0x82000000 0 0xfa000000 0x0 0xfa000000 0 0x600000 0x81000000 0 0xfa600000 0x0 0xfa600000 0 0x100000 >; @@ -1108,12 +1221,13 @@ rga: rga@ff680000 { compatible = "rockchip,rk3399-rga"; reg = <0x0 0xff680000 0x0 0x10000>; - interrupts = ; + interrupts = ; interrupt-names = "rga"; clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>; clock-names = "aclk", "hclk", "sclk"; resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>; reset-names = "core", "axi", "ahb"; + power-domains = <&power RK3399_PD_RGA>; status = "disabled"; }; @@ -1172,9 +1286,9 @@ u2phy0_otg: otg-port { #phy-cells = <0>; - interrupts = , - , - ; + interrupts = , + , + ; interrupt-names = "otg-bvalid", "otg-id", "linestate"; status = "disabled"; @@ -1182,7 +1296,7 @@ u2phy0_host: host-port { #phy-cells = <0>; - interrupts = ; + interrupts = ; interrupt-names = "linestate"; status = "disabled"; }; @@ -1197,9 +1311,19 @@ clock-output-names = "clk_usbphy1_480m"; status = "disabled"; + u2phy1_otg: otg-port { + #phy-cells = <0>; + interrupts = , + , + ; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + status = "disabled"; + }; + u2phy1_host: host-port { #phy-cells = <0>; - interrupts = ; + interrupts = ; interrupt-names = "linestate"; status = "disabled"; }; @@ -1250,13 +1374,13 @@ compatible = "snps,dw-wdt"; reg = <0x0 0xff840000 0x0 0x100>; clocks = <&cru PCLK_WDT>; - interrupts = ; + interrupts = ; }; rktimer: rktimer@ff850000 { compatible = "rockchip,rk3399-timer"; reg = <0x0 0xff850000 0x0 0x1000>; - interrupts = ; + interrupts = ; clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER00>; clock-names = "pclk", "timer"; }; @@ -1264,7 +1388,7 @@ spdif: spdif@ff870000 { compatible = "rockchip,rk3399-spdif"; reg = <0x0 0xff870000 0x0 0x1000>; - interrupts = ; + interrupts = ; dmas = <&dmac_bus 7>; dma-names = "tx"; clock-names = "mclk", "hclk"; @@ -1278,7 +1402,7 @@ compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xff880000 0x0 0x1000>; rockchip,grf = <&grf>; - interrupts = ; + interrupts = ; dmas = <&dmac_bus 0>, <&dmac_bus 1>; dma-names = "tx", "rx"; clock-names = "i2s_clk", "i2s_hclk"; @@ -1291,7 +1415,7 @@ i2s1: i2s@ff890000 { compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xff890000 0x0 0x1000>; - interrupts = ; + interrupts = ; dmas = <&dmac_bus 2>, <&dmac_bus 3>; dma-names = "tx", "rx"; clock-names = "i2s_clk", "i2s_hclk"; @@ -1304,7 +1428,7 @@ i2s2: i2s@ff8a0000 { compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xff8a0000 0x0 0x1000>; - interrupts = ; + interrupts = ; dmas = <&dmac_bus 4>, <&dmac_bus 5>; dma-names = "tx", "rx"; clock-names = "i2s_clk", "i2s_hclk"; @@ -1320,9 +1444,9 @@ reg = <0x0 0xff9a0000 0x0 0x10000>; - interrupts = , - , - ; + interrupts = , + , + ; interrupt-names = "GPU", "JOB", "MMU"; clocks = <&cru ACLK_GPU>; @@ -1333,12 +1457,12 @@ power-off-delay-ms = <200>; status = "disabled"; - power_model { + gpu_power_model: power_model { compatible = "arm,mali-simple-power-model"; voltage = <900>; frequency = <500>; static-power = <300>; - dynamic-power = <1780>; + dynamic-power = <396>; ts = <32000 4700 (-80) 2>; thermal-zone = "gpu-thermal"; }; @@ -1366,7 +1490,7 @@ vopl: vop@ff8f0000 { compatible = "rockchip,rk3399-vop-lit"; reg = <0x0 0xff8f0000 0x0 0x3efc>; - interrupts = ; + interrupts = ; clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>; @@ -1399,7 +1523,7 @@ vopl_mmu: iommu@ff8f3f00 { compatible = "rockchip,iommu"; reg = <0x0 0xff8f3f00 0x0 0x100>; - interrupts = ; + interrupts = ; interrupt-names = "vopl_mmu"; #iommu-cells = <0>; status = "disabled"; @@ -1408,7 +1532,7 @@ vopb: vop@ff900000 { compatible = "rockchip,rk3399-vop-big"; reg = <0x0 0xff900000 0x0 0x3efc>; - interrupts = ; + interrupts = ; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>; @@ -1441,7 +1565,7 @@ vopb_mmu: iommu@ff903f00 { compatible = "rockchip,iommu"; reg = <0x0 0xff903f00 0x0 0x100>; - interrupts = ; + interrupts = ; interrupt-names = "vopb_mmu"; #iommu-cells = <0>; status = "disabled"; @@ -1453,7 +1577,7 @@ reg-io-width = <4>; rockchip,grf = <&grf>; power-domains = <&power RK3399_PD_HDCP>; - interrupts = ; + interrupts = ; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru SCLK_HDMI_SFR>, <&cru PCLK_EDP_CTRL>; clock-names = "iahb", "isfr", "vpll", "grf"; status = "disabled"; @@ -1477,7 +1601,7 @@ mipi_dsi: mipi@ff960000 { compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"; reg = <0x0 0xff960000 0x0 0x8000>; - interrupts = ; + interrupts = ; clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, <&cru SCLK_DPHY_TX0_CFG>; clock-names = "ref", "pclk", "phy_cfg"; @@ -1511,7 +1635,7 @@ edp: edp@ff970000 { compatible = "rockchip,rk3399-edp"; reg = <0x0 0xff970000 0x0 0x8000>; - interrupts = ; + interrupts = ; clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>; clock-names = "dp", "pclk"; resets = <&cru SRST_P_EDP_CTRL>; @@ -1561,7 +1685,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x0 0xff720000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO0_PMU>; - interrupts = ; + interrupts = ; gpio-controller; #gpio-cells = <0x2>; @@ -1574,7 +1698,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x0 0xff730000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO1_PMU>; - interrupts = ; + interrupts = ; gpio-controller; #gpio-cells = <0x2>; @@ -1587,7 +1711,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; - interrupts = ; + interrupts = ; gpio-controller; #gpio-cells = <0x2>; @@ -1600,7 +1724,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x0 0xff788000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; - interrupts = ; + interrupts = ; gpio-controller; #gpio-cells = <0x2>; @@ -1613,7 +1737,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO4>; - interrupts = ; + interrupts = ; gpio-controller; #gpio-cells = <0x2>; @@ -1634,6 +1758,21 @@ bias-disable; }; + pcfg_pull_up_20ma: pcfg-pull-up-20ma { + bias-pull-up; + drive-strength = <20>; + }; + + pcfg_pull_none_20ma: pcfg-pull-none-20ma { + bias-disable; + drive-strength = <20>; + }; + + pcfg_pull_none_18ma: pcfg-pull-none-18ma { + bias-disable; + drive-strength = <18>; + }; + pcfg_pull_none_12ma: pcfg-pull-none-12ma { bias-disable; drive-strength = <12>;