X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Frk312x.dtsi;h=1324e24a8ccdaa217800c2db34f327ad089b32f7;hb=d91ca21f9ac06733b3895deab952e016ed20c2a1;hp=ea52b54ff41f95b7dcc131db3201e6499d9586c4;hpb=fa7ee75d42c5fd29b929d3e5ac9ecaec98a48213;p=firefly-linux-kernel-4.4.55.git

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index ea52b54ff41f..1324e24a8ccd 100755
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -51,6 +51,15 @@
 		};
 	};
 
+	psci {
+		compatible      = "arm,psci";
+		method          = "smc";
+		cpu_suspend     = <0x84000001>;
+		cpu_off         = <0x84000002>;
+		cpu_on          = <0x84000003>;
+		migrate         = <0x84000005>;
+	};
+
 	gic: interrupt-controller@10139000 {
 		compatible = "arm,cortex-a15-gic";
 		interrupt-controller;
@@ -169,6 +178,8 @@
 		pdma: pdma@20078000 {
 			compatible = "arm,pl330", "arm,primecell";
 			reg = <0x20078000 0x4000>;
+			clocks = <&clk_gates5 1>;
+			clock-names = "apb_pclk";
 			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 			#dma-cells = <1>;
@@ -371,7 +382,7 @@
 				/*aclk_peri_pre*/
 				//<&clk_gates10 10>,/*aclk_gmac*/
 				<&clk_gates4 3>,/*aclk_peri_axi_matrix*/
-				<&clk_gates5 1>,/*aclk_dmac2*/
+				//<&clk_gates5 1>,/*aclk_dmac2*/
 				<&clk_gates9 15>,/*aclk_peri_niu*/
 				<&clk_gates9 2>,/*g_pclk_pmu*/
 				<&clk_gates9 3>,/*g_pclk_pmu_noc*/
@@ -537,6 +548,8 @@
 		num-slots = <1>;
 		fifo-depth = <0x100>;
 		bus-width = <8>;
+		cru_regsbase = <0x124>;
+		cru_reset_offset = <3>;
         };
 
 
@@ -549,7 +562,7 @@
 		pinctrl-names = "default", "idle", "udbg";
 		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd  &sdmmc0_dectn &sdmmc0_bus4>;
 		pinctrl-1 = <&sdmmc0_gpio>;
-		pinctrl-2 = <&uart2_xfer>;
+		pinctrl-2 = <&uart2_xfer &sdmmc0_dectn>;
 		clocks = <&clk_sdmmc0>, <&clk_gates5 10>;
 		clock-names = "clk_mmc", "hclk_mmc";
 		dmas = <&pdma 10>;
@@ -557,6 +570,8 @@
 		num-slots = <1>;
 		fifo-depth = <0x100>;
 		bus-width = <4>;
+		cru_regsbase = <0x124>;
+		cru_reset_offset = <1>;
 	};
 
 	sdio: rksdmmc@10218000 {
@@ -575,6 +590,8 @@
 		num-slots = <1>;
 		fifo-depth = <0x100>;
 		bus-width = <4>;
+		cru_regsbase = <0x124>;
+		cru_reset_offset = <2>;
 	};
 	
 	spi0: spi@20074000 {
@@ -669,8 +686,12 @@
 	dwc_control_usb: dwc-control-usb@20008000 {
 		compatible = "rockchip,rk3126-dwc-control-usb";
 		reg = <0x20008000 0x4>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "otg_bvalid";
+		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "otg_bvalid",
+				  "otg0_linestate",
+				  "otg1_linestate";
 		clocks = <&clk_gates9 13>;
 		clock-names = "hclk_usb_peri";
 		rockchip,remote_wakeup;
@@ -801,6 +822,9 @@
 		rockchip,sub = <&vpu>, <&hevc>;
 		clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
 		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		resets = <&reset RK3128_RST_VCODEC_H>, <&reset RK3128_RST_VCODEC_A>,
+			<&reset RK3128_RST_HEVC>;
+		reset-names = "video_h", "video_a", "video";
 		mode_bit = <15>;
 		mode_ctrl = <0x144>;
 		name = "vpu_combo";
@@ -814,6 +838,7 @@
 		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&clk_gates9 8>, <&clk_gates9 7>;
 		clock-names = "aclk_iep", "hclk_iep";
+		version = <1>;
 		status = "okay";
 	};
 	
@@ -970,7 +995,7 @@
 		dais {
 			dai0 {
 				audio-codec = <&codec_hdmi_spdif>;
-				i2s-controller = <&spdif>;
+				audio-controller = <&spdif>;
 			};
 		};
 	};
@@ -989,7 +1014,7 @@
 		dais {
 			dai0 {
 				audio-codec = <&codec>;
-				i2s-controller = <&i2s1>;
+				audio-controller = <&i2s1>;
 				format = "i2s";
 				//continuous-clock;
 				//bitclock-inversion;
@@ -999,7 +1024,7 @@
 			};
 			dai1 {
 				audio-codec = <&codec>;
-				i2s-controller = <&i2s1>;
+				audio-controller = <&i2s1>;
 				format = "i2s";
 				//continuous-clock;
 				//bitclock-inversion;