X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Frk312x-pinctrl.dtsi;h=197fe6640d340b8290f17a45411f11221ec558f5;hb=4bce734436e7ed025cc945bc0a56259232e085d4;hp=7a189857da9eba15519a87449cb5640117db31b0;hpb=b017600ce33f4257d39bf9f1636771e5cf0ca640;p=firefly-linux-kernel-4.4.55.git

diff --git a/arch/arm/boot/dts/rk312x-pinctrl.dtsi b/arch/arm/boot/dts/rk312x-pinctrl.dtsi
index 7a189857da9e..197fe6640d34 100755
--- a/arch/arm/boot/dts/rk312x-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk312x-pinctrl.dtsi
@@ -96,7 +96,7 @@
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <UART0_SIN>,
 						<UART0_SOUT>;
-				rockchip,pull = <VALUE_PULL_DEFAULT>;
+				rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
 				
 				
 			};
@@ -566,6 +566,10 @@
 
 			};
 
+			sdmmc0_pwren: sdmmc0-pwren{
+				rockchip,pins = <MMC0_PWREN>;
+				rockchip,pull = <VALUE_PULL_UP>;
+			};
 
 			sdmmc0_bus1: sdmmc0-bus-width1 {
 				rockchip,pins = <MMC0_D0>;
@@ -589,6 +593,7 @@
 					<GPIO1_B7>,  //CMD
 					<GPIO1_C0>,  //CLK
 					<GPIO1_C1>,  //DET
+					<GPIO1_B6>,  //PWREN
 					<GPIO1_C2>,  //D0
 					<GPIO1_C3>,  //D1
 					<GPIO1_C4>,  //D2
@@ -657,15 +662,33 @@
 
 			sdio0_cmd: sdio0_cmd {
 				rockchip,pins = <MMC1_CMD>;
-				rockchip,pull = <VALUE_PULL_UP>;
-				
-
+				rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
+			};
+			sdio0_clk: sdio0_clk {
+				rockchip,pins = <SDMMC_CLKOUT>;
+				rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
+			};
+			sdio0_bus1: sdio0-bus-width1 {
+				rockchip,pins = <SDMMC_DATA0>;
+				rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
+			};
+			sdio0_bus4: sdio0-bus-width4 {
+				rockchip,pins = <SDMMC_DATA0>,
+						<SDMMC_DATA1>,
+						<SDMMC_DATA2>,
+						<SDMMC_DATA3>;
+				rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
 			};
 
 			sdio0_gpio: sdio0_gpio{
 				rockchip,pins = <GPIO0_D6>, //pwren
-						<GPIO0_A3>; //cmd
-				rockchip,pull = <VALUE_PULL_UP>;
+						<GPIO0_A3>, //cmd
+						<GPIO1_A0>, //clk
+						<GPIO1_A1>, //data0
+						<GPIO1_A2>, //data1
+						<GPIO1_A4>, //data2
+						<GPIO1_A5>; //data3
+				rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
 			};
 
 		};
@@ -783,7 +806,12 @@
 				rockchip,pins = <GMAC_COL>;
 				rockchip,pull = <VALUE_PULL_DEFAULT>;
 			};
-			
+
+			gmac_col_gpio:gmac-col-gpio {
+				rockchip,pins = <GPIO2_D0>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+		
 			gmac_mdc:gmac-mdc {
 				rockchip,pins = <GMAC_MDC>;
 				rockchip,pull = <VALUE_PULL_DEFAULT>;
@@ -800,7 +828,6 @@
 						<LCDC0_HSYNC>,
 						<LCDC0_VSYNC>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 
 			lcdc0_gpio:lcdc0-gpio {
@@ -810,7 +837,51 @@
 						<FUNC_TO_GPIO(LCDC0_HSYNC)>,
 						<FUNC_TO_GPIO(LCDC0_VSYNC)>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
+			};
+
+		};
+
+		gpio2_lcdc0_d {
+			lcdc0_lcdc_d: lcdc0-lcdc_d {
+				rockchip,pins =
+						<LCDC0_D10>,
+						<LCDC0_D11>,
+						<LCDC0_D12>,
+						<LCDC0_D13>,
+						<LCDC0_D14>,
+						<LCDC0_D15>,
+						<LCDC0_D16>,
+						<LCDC0_D17>;
+						/*
+						<LCDC0_D18>,
+						<LCDC0_D19>,
+						<LCDC0_D20>,
+						<LCDC0_D21>,
+						<LCDC0_D22>,
+						<LCDC0_D23>;
+						*/
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+			};
+
+			lcdc0_lcdc_gpio: lcdc0-lcdc_gpio {
+				rockchip,pins =
+						<FUNC_TO_GPIO(LCDC0_D10)>,
+						<FUNC_TO_GPIO(LCDC0_D11)>,
+						<FUNC_TO_GPIO(LCDC0_D12)>,
+						<FUNC_TO_GPIO(LCDC0_D13)>,
+						<FUNC_TO_GPIO(LCDC0_D14)>,
+						<FUNC_TO_GPIO(LCDC0_D15)>,
+						<FUNC_TO_GPIO(LCDC0_D16)>,
+						<FUNC_TO_GPIO(LCDC0_D17)>;
+						/*
+						<FUNC_TO_GPIO(LCDC0_D18)>,
+						<FUNC_TO_GPIO(LCDC0_D19)>,
+						<FUNC_TO_GPIO(LCDC0_D20)>,
+						<FUNC_TO_GPIO(LCDC0_D21)>,
+						<FUNC_TO_GPIO(LCDC0_D22)>,
+						<FUNC_TO_GPIO(LCDC0_D23)>;
+						*/
+				rockchip,pull = <VALUE_PULL_DOWN>;
 			};
 
 		};