X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Frk3036.dtsi;h=36a626e9e37e7c48adc7f3f525315c6c942c344f;hb=f8847331f81df69b5ea2d0874a0f9c68ee5b49b3;hp=38ef3d7d0d9a22d4fcba1a901e460bc18210f249;hpb=72f51bac1e679a8aacaf76ea5775d89e4490a76d;p=firefly-linux-kernel-4.4.55.git

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 38ef3d7d0d9a..36a626e9e37e 100755
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -17,6 +17,7 @@
 		i2c0 = &i2c0;
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
+		lcdc = &lcdc;
 		spi0 = &spi0;
 	};
 
@@ -251,11 +252,11 @@
 			<&aclk_vcodec_pre &clk_gpll>, <&clk_hevc_core &clk_gpll>,
 			<&aclk_vio_pre &clk_gpll>, <&clk_mac_pll &clk_apll>;
 		rockchip,clocks-init-rate =
-			<&clk_core 1000000000>, <&clk_gpll 594000000>,
+			<&clk_core 1200000000>, <&clk_gpll 1188000000>,
 			<&aclk_cpu_pre 150000000>, <&hclk_cpu_pre 75000000>,
 			<&pclk_cpu_pre 75000000>,	 <&aclk_peri_pre 150000000>,
 			<&hclk_peri_pre 75000000>, <&pclk_peri_pre 75000000>,
-			<&clk_gpu 300000000>,	 <&aclk_vio_pre 300000000>,
+			<&clk_gpu 400000000>,	 <&aclk_vio_pre 300000000>,
 			<&hclk_vio_pre 150000000>, <&aclk_vcodec_pre 300000000>,
 			<&clk_hevc_core 200000000>, <&clk_mac_pll_div 50000000>,
 			<&clk_mac_ref_div 25000000>;
@@ -465,6 +466,7 @@
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&clk_gates7 10>;
 		clock-names = "pclk_pwm";
+		remote_pwm_id = <3>;
 		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 		status = "okay";
 	};
@@ -493,9 +495,10 @@
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		pinctrl-names = "default", "idle";
+		pinctrl-names = "default", "idle", "udbg";
 		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
 		pinctrl-1 = <&sdmmc0_gpio>;
+		pinctrl-2 = <&uart2_xfer &sdmmc0_dectn>;
 		cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/
 		clocks = <&clk_sdmmc0>, <&clk_gates5 10>;
 		clock-names = "clk_mmc", "hclk_mmc";
@@ -594,6 +597,7 @@
 	fb: fb{
 		compatible = "rockchip,rk-fb";
 		rockchip,disp-mode = <NO_DUAL>;
+		rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 	};
 
 	rk_screen: rk_screen{
@@ -634,17 +638,18 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		ion_cma: rockchip,ion-heap@1 { /* CMA HEAP */
-			compatible = "rockchip,ion-reserve";
-			rockchip,ion_heap = <1>;
+		ion_cma: rockchip,ion-heap@4 { /* CMA HEAP */
+			compatible = "rockchip,ion-heap";
+			rockchip,ion_heap = <4>;
 			reg = <0x00000000 0x00000000>; /* 0MB */
 		};
-		rockchip,ion-heap@3 { /* VMALLOC HEAP */
-			rockchip,ion_heap = <3>;
+		rockchip,ion-heap@0 { /* VMALLOC HEAP */
+			compatible = "rockchip,ion-heap";
+			rockchip,ion_heap = <0>;
 		};
 	};
 
-	vpu: vpu_service@10108000 {
+	/*vpu: vpu_service@10108000 {
 		compatible = "vpu_service";
 		iommu_enabled = <1>;
 		reg = <0x10108000 0x800>;
@@ -666,6 +671,37 @@
 		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
 		name = "hevc_service";
 		status = "okay";
+	};*/
+	vpu: vpu_service {
+		compatible = "rockchip,vpu_sub";
+		iommu_enabled = <1>;
+		reg = <0x10108400 0x400>;
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		dev_mode = <0>;
+		name = "vpu_service";
+	};
+
+	hevc: hevc_service {
+		compatible = "rockchip,hevc_sub";
+		iommu_enabled = <1>;
+		reg = <0x1010c000 0x400>;
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		dev_mode = <1>;
+		name = "hevc_service";
+	};
+
+	vpu_combo: vpu_combo@ff9a0000 {
+		compatible = "rockchip,vpu_combo";
+		subcnt = <2>;
+		rockchip,sub = <&vpu>, <&hevc>;
+		clocks = <&aclk_vcodec_pre>, <&clk_gates3 12>, <&clk_hevc_core>;
+		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		mode_bit = <3>;
+		mode_ctrl = <0x144>;
+		name = "vpu_combo";
+		status = "okay";
 	};
 
 	vop_mmu {
@@ -700,7 +736,10 @@
 			|RKPM_CTR_GTCLKS
 			|RKPM_CTR_PLLS
 			|RKPM_CTR_IDLESRAM_MD
-                        |RKPM_CTR_DDR
+			|RKPM_CTR_DDR
+			|RKPM_CTR_VOLTS
+			|RKPM_CTR_VOL_PWM2
+
 			//|RKPM_CTR_GPIOS
 			//|RKPM_CTR_SYSCLK_DIV
 			//|RKPM_CTR_IDLEAUTO_MD