X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=action.cc;h=b435524d6d4a423405e221724794e8fcfeae4f84;hb=80617a5bb7ad550ac821b68e81dce05b5c906309;hp=c96949bc906cc02a9ca3cb50af761a92feda94c7;hpb=f291abaf7a05ebdc5981072212b55265dafc1c4a;p=c11tester.git diff --git a/action.cc b/action.cc index c96949bc..b435524d 100644 --- a/action.cc +++ b/action.cc @@ -1,11 +1,14 @@ #include +#define __STDC_FORMAT_MACROS +#include +#include #include "model.h" #include "action.h" #include "clockvector.h" #include "common.h" -ModelAction::ModelAction(action_type_t type, memory_order order, void *loc, int value) : +ModelAction::ModelAction(action_type_t type, memory_order order, void *loc, uint64_t value) : type(type), order(order), location(loc), @@ -26,12 +29,17 @@ ModelAction::~ModelAction() bool ModelAction::is_read() const { - return type == ATOMIC_READ; + return type == ATOMIC_READ || type == ATOMIC_RMWR || type == ATOMIC_RMW; } bool ModelAction::is_write() const { - return type == ATOMIC_WRITE || type == ATOMIC_INIT; + return type == ATOMIC_WRITE || type == ATOMIC_RMW || type == ATOMIC_INIT; +} + +bool ModelAction::is_rmwr() const +{ + return type == ATOMIC_RMWR; } bool ModelAction::is_rmw() const @@ -39,6 +47,11 @@ bool ModelAction::is_rmw() const return type == ATOMIC_RMW; } +bool ModelAction::is_rmwc() const +{ + return type == ATOMIC_RMWC; +} + bool ModelAction::is_initialization() const { return type == ATOMIC_INIT; @@ -47,9 +60,9 @@ bool ModelAction::is_initialization() const bool ModelAction::is_acquire() const { switch (order) { - case memory_order_acquire: - case memory_order_acq_rel: - case memory_order_seq_cst: + case std::memory_order_acquire: + case std::memory_order_acq_rel: + case std::memory_order_seq_cst: return true; default: return false; @@ -59,9 +72,9 @@ bool ModelAction::is_acquire() const bool ModelAction::is_release() const { switch (order) { - case memory_order_release: - case memory_order_acq_rel: - case memory_order_seq_cst: + case std::memory_order_release: + case std::memory_order_acq_rel: + case std::memory_order_seq_cst: return true; default: return false; @@ -70,7 +83,7 @@ bool ModelAction::is_release() const bool ModelAction::is_seqcst() const { - return order==memory_order_seq_cst; + return order==std::memory_order_seq_cst; } bool ModelAction::same_var(const ModelAction *act) const @@ -83,6 +96,27 @@ bool ModelAction::same_thread(const ModelAction *act) const return tid == act->tid; } +void ModelAction::copy_typeandorder(ModelAction * act) { + this->type=act->type; + this->order=act->order; +} + +/** This method changes an existing read part of an RMW action into either: + * (1) a full RMW action in case of the completed write or + * (2) a READ action in case a failed action. + * @todo If the memory_order changes, we may potentially need to update our + * clock vector. + */ +void ModelAction::process_rmw(ModelAction * act) { + this->order=act->order; + if (act->is_rmwc()) + this->type=ATOMIC_READ; + else if (act->is_rmw()) { + this->type=ATOMIC_RMW; + this->value=act->value; + } +} + /** The is_synchronizing method should only explore interleavings if: * (1) the operations are seq_cst and don't commute or * (2) the reordering may establish or break a synchronization relation. @@ -92,7 +126,6 @@ bool ModelAction::same_thread(const ModelAction *act) const * @param act is the action to consider exploring a reordering. * @return tells whether we have to explore a reordering. */ - bool ModelAction::is_synchronizing(const ModelAction *act) const { //Same thread can't be reordered @@ -102,7 +135,7 @@ bool ModelAction::is_synchronizing(const ModelAction *act) const // Different locations commute if (!same_var(act)) return false; - + // Explore interleavings of seqcst writes to guarantee total order // of seq_cst operations that don't commute if (is_write() && is_seqcst() && act->is_write() && act->is_seqcst()) @@ -120,7 +153,8 @@ bool ModelAction::is_synchronizing(const ModelAction *act) const void ModelAction::create_cv(const ModelAction *parent) { - ASSERT(cv == NULL); + if (cv) + delete cv; if (parent) cv = new ClockVector(parent->cv, this); @@ -128,13 +162,28 @@ void ModelAction::create_cv(const ModelAction *parent) cv = new ClockVector(NULL, this); } +/** Update the model action's read_from action */ void ModelAction::read_from(const ModelAction *act) { ASSERT(cv); - if (act->is_release() && this->is_acquire()) - cv->merge(act->cv); reads_from = act; - value = act->value; + if (act != NULL && this->is_acquire()) { + std::vector release_heads; + model->get_release_seq_heads(this, &release_heads); + for (unsigned int i = 0; i < release_heads.size(); i++) + synchronize_with(release_heads[i]); + } +} + +/** + * Synchronize the current thread with the thread corresponding to the + * ModelAction parameter. + * @param act The ModelAction to synchronize with + */ +void ModelAction::synchronize_with(const ModelAction *act) { + ASSERT(*act < *this); + model->check_promises(cv, act->cv); + cv->merge(act->cv); } /** @@ -150,11 +199,14 @@ bool ModelAction::happens_before(const ModelAction *act) const void ModelAction::print(void) const { - const char *type_str; + const char *type_str, *mo_str; switch (this->type) { case THREAD_CREATE: type_str = "thread create"; break; + case THREAD_START: + type_str = "thread start"; + break; case THREAD_YIELD: type_str = "thread yield"; break; @@ -170,6 +222,12 @@ void ModelAction::print(void) const case ATOMIC_RMW: type_str = "atomic rmw"; break; + case ATOMIC_RMWR: + type_str = "atomic rmwr"; + break; + case ATOMIC_RMWC: + type_str = "atomic rmwc"; + break; case ATOMIC_INIT: type_str = "init atomic"; break; @@ -177,8 +235,31 @@ void ModelAction::print(void) const type_str = "unknown type"; } - printf("(%3d) Thread: %-2d Action: %-13s MO: %d Loc: %14p Value: %-4d", - seq_number, id_to_int(tid), type_str, order, location, value); + uint64_t valuetoprint=type==ATOMIC_READ?(reads_from!=NULL?reads_from->value:VALUE_NONE):value; + + switch (this->order) { + case std::memory_order_relaxed: + mo_str = "relaxed"; + break; + case std::memory_order_acquire: + mo_str = "acquire"; + break; + case std::memory_order_release: + mo_str = "release"; + break; + case std::memory_order_acq_rel: + mo_str = "acq_rel"; + break; + case std::memory_order_seq_cst: + mo_str = "seq_cst"; + break; + default: + mo_str = "unknown"; + break; + } + + printf("(%3d) Thread: %-2d Action: %-13s MO: %7s Loc: %14p Value: %-12" PRIu64, + seq_number, id_to_int(tid), type_str, mo_str, location, valuetoprint); if (reads_from) printf(" Rf: %d", reads_from->get_seq_number()); if (cv) {