X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=CREDITS.TXT;h=bb5e254d5c303238273a8fae5fc7a406b023fd88;hb=f735a7f88dcb87cca4622ce45effa8134759b7d8;hp=e7140ed27ab06a8e9abb9986c19ce5cfa82d1442;hpb=5eebf6ff2052c2ee928abaf387b6458a765393c4;p=oota-llvm.git diff --git a/CREDITS.TXT b/CREDITS.TXT index e7140ed27ab..bb5e254d5c3 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -5,8 +5,8 @@ done! The list is sorted by surname and formatted to allow easy grepping and beautification by scripts. The fields are: name (N), email (E), web-address -(W), PGP key ID and fingerprint (P), description (D), and snail-mail address -(S). +(W), PGP key ID and fingerprint (P), description (D), snail-mail address +(S), and (I) IRC handle. N: Vikram Adve @@ -17,11 +17,15 @@ D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM N: Owen Anderson E: resistor@mac.com D: LCSSA pass and related LoopUnswitch work -D: GVNPRE pass, TargetData refactoring, random improvements +D: GVNPRE pass, DataLayout refactoring, random improvements N: Henrik Bach D: MingW Win32 API portability layer +N: Aaron Ballman +E: aaron@aaronballman.com +D: __declspec attributes, Windows support, general bug fixing + N: Nate Begeman E: natebegeman@mac.com D: PowerPC backend developer @@ -50,9 +54,17 @@ N: Cameron Buschardt E: buschard@uiuc.edu D: The `mem2reg' pass - promotes values stored in memory to registers +N: Brendon Cahoon +E: bcahoon@codeaurora.org +D: Loop unrolling with run-time trip counts. + N: Chandler Carruth E: chandlerc@gmail.com -D: LinkTimeOptimizer for Linux, via binutils integration, and C API +E: chandlerc@google.com +D: Hashing algorithms and interfaces +D: Inline cost analysis +D: Machine block placement pass +D: SROA N: Casey Carter E: ccarter@uiuc.edu @@ -83,6 +95,10 @@ N: John T. Criswell E: criswell@uiuc.edu D: Original Autoconf support, documentation improvements, bug fixes +N: Anshuman Dasgupta +E: adasgupt@codeaurora.org +D: Deterministic finite automaton based infrastructure for VLIW packetization + N: Stefanus Du Toit E: stefanus.dutoit@rapidmind.com D: Bug fixes and minor improvements @@ -95,6 +111,10 @@ N: Alkis Evlogimenos E: alkis@evlogimenos.com D: Linear scan register allocator, many codegen improvements, Java frontend +N: Hal Finkel +E: hfinkel@anl.gov +D: Basic-block autovectorization, PowerPC backend improvements + N: Ryan Flynn E: pizza@parseerror.com D: Miscellaneous bug fixes @@ -123,7 +143,7 @@ E: foldr@codedgers.com D: Author of llvmc2 N: Dan Gohman -E: gohman@apple.com +E: dan433584@gmail.com D: Miscellaneous bug fixes N: David Goodwin @@ -202,6 +222,10 @@ N: Benjamin Kramer E: benny.kra@gmail.com D: Miscellaneous bug fixes +N: Sundeep Kushwaha +E: sundeepk@codeaurora.org +D: Implemented DFA-based target independent VLIW packetizer + N: Christopher Lamb E: christopher.lamb@gmail.com D: aligned load/store support, parts of noalias and restrict support @@ -237,6 +261,10 @@ N: Nick Lewycky E: nicholas@mxc.ca D: PredicateSimplifier pass +N: Tony Linthicum, et. al. +E: tlinth@codeaurora.org +D: Backend for Qualcomm's Hexagon VLIW processor. + N: Bruno Cardoso Lopes E: bruno.cardoso@gmail.com W: http://www.brunocardoso.org @@ -263,10 +291,15 @@ N: Scott Michel E: scottm@aero.org D: Added STI Cell SPU backend. +N: Kai Nacke +E: kai@redstar.de +D: Support for implicit TLS model used with MS VC runtime + N: Takumi Nakamura E: geek4civic@gmail.com E: chapuni@hf.rim.or.jp D: Cygwin and MinGW support. +D: Win32 tweaks. S: Yokohama, Japan N: Edward O'Callaghan @@ -297,10 +330,6 @@ D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements D: Optimizer improvements, Loop Index Split -N: Sandeep Patel -E: deeppatel1987@gmail.com -D: ARM calling conventions rewrite, hard float support - N: Wesley Peck E: peckw@wesleypeck.com W: http://wesleypeck.com/ @@ -315,12 +344,35 @@ W: http://vladimir_prus.blogspot.com E: ghost@cs.msu.su D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass +N: Kalle Raiskila +E: kalle.rasikila@nokia.com +D: Some bugfixes to CellSPU + +N: Xerxes Ranby +E: xerxes@zafena.se +D: Cmake dependency chain and various bug fixes + +N: Alex Rosenberg +E: alexr@leftfield.org +I: arosenberg +D: ARM calling conventions rewrite, hard float support + +N: Chad Rosier +E: mcrosier@apple.com +D: ARM fast-isel improvements +D: Performance monitoring + +N: Nadav Rotem +E: nrotem@apple.com +D: X86 code generation improvements, Loop Vectorizer. + N: Roman Samoilov E: roman@codedgers.com D: MSIL backend N: Duncan Sands E: baldrick@free.fr +I: baldrick D: Ada support in llvm-gcc D: Dragonegg plugin D: Exception handling improvements @@ -352,6 +404,10 @@ E: rspencer@reidspencer.com W: http://reidspencer.com/ D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid +N: Craig Topper +E: craig.topper@gmail.com +D: X86 codegen and disassembler improvements. AVX2 support. + N: Edwin Torok E: edwintorok@gmail.com D: Miscellaneous bug fixes @@ -365,16 +421,9 @@ E: lauro.venancio@indt.org.br D: ARM backend improvements D: Thread Local Storage implementation -N: Xerxes Ranby -E: xerxes@zafena.se -D: Cmake dependency chain and various bug fixes - -N: Nadav Rotem -E: nadav.rotem@intel.com -D: Vector code generation improvements. - N: Bill Wendling E: wendling@apple.com +D: Exception handling D: Bunches of stuff N: Bob Wilson