X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=CREDITS.TXT;h=0447c40e381b547a2e2e7db3723213ce8085cfd7;hb=b5a006e88f78d0c2e88aed1941062951827870ef;hp=bb5e254d5c303238273a8fae5fc7a406b023fd88;hpb=78532fd6ef87b0256e5fd5c33ccc1ee7e638061d;p=oota-llvm.git

diff --git a/CREDITS.TXT b/CREDITS.TXT
index bb5e254d5c3..0447c40e381 100644
--- a/CREDITS.TXT
+++ b/CREDITS.TXT
@@ -100,13 +100,17 @@ E: adasgupt@codeaurora.org
 D: Deterministic finite automaton based infrastructure for VLIW packetization
 
 N: Stefanus Du Toit
-E: stefanus.dutoit@rapidmind.com
+E: stefanus.du.toit@intel.com
 D: Bug fixes and minor improvements
 
 N: Rafael Avila de Espindola
 E: rafael.espindola@gmail.com
 D: The ARM backend
 
+N: Dave Estes
+E: cestes@codeaurora.org
+D: AArch64 machine description for Cortex-A53
+
 N: Alkis Evlogimenos
 E: alkis@evlogimenos.com
 D: Linear scan register allocator, many codegen improvements, Java frontend
@@ -132,6 +136,7 @@ W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
 D: PPC backend fixes for Linux
 
 N: Louis Gerbarg
+E: lgg@apple.com
 D: Portions of the PowerPC backend
 
 N: Saem Ghani
@@ -161,10 +166,12 @@ D: Improvements for space efficiency
 
 N: James Grosbach
 E: grosbach@apple.com
+I: grosbach
 D: SjLj exception handling support
 D: General fixes and improvements for the ARM back-end
 D: MCJIT
 D: ARM integrated assembler and assembly parser
+D: Led effort for the backend formerly known as ARM64
 
 N: Lang Hames
 E: lhames@gmail.com
@@ -251,6 +258,13 @@ D: The initial llvm-ar tool, converted regression testsuite to dejagnu
 D: Modulo scheduling in the SparcV9 backend
 D: Release manager (1.7+)
 
+N: Sylvestre Ledru
+E: sylvestre@debian.org
+W: http://sylvestre.ledru.info/
+W: http://llvm.org/apt/
+D: Debian and Ubuntu packaging
+D: Continuous integration with jenkins
+
 N: Andrew Lenharth
 E: alenhar2@cs.uiuc.edu
 W: http://www.lenharth.org/~andrewl/
@@ -294,6 +308,7 @@ D: Added STI Cell SPU backend.
 N: Kai Nacke
 E: kai@redstar.de
 D: Support for implicit TLS model used with MS VC runtime
+D: Dumping of Win64 EH structures
 
 N: Takumi Nakamura
 E: geek4civic@gmail.com
@@ -330,6 +345,10 @@ D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
 D: Optimizer improvements, Loop Index Split
 
+N: Ana Pazos
+E: apazos@codeaurora.org
+D: Fixes and improvements to the AArch64 backend
+
 N: Wesley Peck
 E: peckw@wesleypeck.com
 W: http://wesleypeck.com/
@@ -358,9 +377,11 @@ I: arosenberg
 D: ARM calling conventions rewrite, hard float support
 
 N: Chad Rosier
-E: mcrosier@apple.com
-D: ARM fast-isel improvements
-D: Performance monitoring
+E: mcrosier@codeaurora.org
+I: mcrosier
+D: AArch64 fast instruction selection pass
+D: Fixes and improvements to the ARM fast-isel pass
+D: Fixes and improvements to the AArch64 backend
 
 N: Nadav Rotem
 E: nrotem@apple.com
@@ -404,6 +425,11 @@ E: rspencer@reidspencer.com
 W: http://reidspencer.com/
 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
 
+N: Alp Toker
+E: alp@nuanti.com
+W: http://atoker.com/
+D: C++ frontend next generation standards implementation
+
 N: Craig Topper
 E: craig.topper@gmail.com
 D: X86 codegen and disassembler improvements. AVX2 support.
@@ -422,10 +448,11 @@ D: ARM backend improvements
 D: Thread Local Storage implementation
 
 N: Bill Wendling
-E: wendling@apple.com
-D: Exception handling
+I: wendling
+E: isanbard@gmail.com
+D: Release manager, IR Linker, LTO
 D: Bunches of stuff
 
 N: Bob Wilson
 E: bob.wilson@acm.org
-D: Advanced SIMD (NEON) support in the ARM backend
+D: Advanced SIMD (NEON) support in the ARM backend.