X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=CODE_OWNERS.TXT;h=f289ef6f697cb9e1e73bf8b7b5b6e119ee0bbb19;hb=8957f7996c5c0725730202d73c1aae803944773b;hp=fca0b3477c9fd433ced06768d8c6c13be1b239fb;hpb=714a587115aab2068117223ed4d2315795c8bd28;p=oota-llvm.git diff --git a/CODE_OWNERS.TXT b/CODE_OWNERS.TXT index fca0b3477c9..f289ef6f697 100644 --- a/CODE_OWNERS.TXT +++ b/CODE_OWNERS.TXT @@ -12,13 +12,26 @@ N: Joe Abbey E: jabbey@arxan.com D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*) +N: Owen Anderson +E: resistor@mac.com +D: SelectionDAG (lib/CodeGen/SelectionDAG/*) + +N: Rafael Avila de Espindola +E: rafael.espindola@gmail.com +D: Gold plugin (tools/gold/*) + +N: Chandler Carruth +E: chandlerc@gmail.com +E: chandlerc@google.com +D: Config, ADT, Support, inlining & related passse, SROA/mem2reg & related passes, CMake, library layering + N: Evan Cheng E: evan.cheng@apple.com -D: Code generator and all targets +D: ARM target, parts of code generator not covered by someone else N: Eric Christopher E: echristo@gmail.com -D: Debug Information +D: Debug Information, autotools/configure/make build, inline assembly N: Greg Clayton D: LLDB @@ -26,12 +39,17 @@ D: LLDB N: Peter Collingbourne D: libclc +N: Anshuman Dasgupta +E: adasgupt@codeaurora.org +D: Hexagon Backend + N: Hal Finkel E: hfinkel@anl.gov D: BBVectorize and the PowerPC target -N: Doug Gregor -D: Clang Frontend Libraries +N: Venkatraman Govindaraju +E: venkatra@cs.wisc.edu +D: Sparc Backend (lib/Target/Sparc/*) N: Tobias Grosser D: Polly @@ -47,37 +65,63 @@ N: Justin Holewinski E: jholewinski@nvidia.com D: NVPTX Target (lib/Target/NVPTX/*) +N: Andy Kaylor +E: andrew.kaylor@intel.com +D: MCJIT, RuntimeDyld and JIT event listeners + +N: Galina Kistanova +E: gkistanova@gmail.com +D: LLVM Buildbot + N: Anton Korobeynikov -E: asl@math.spbu.ru -D: Exception handling and Windows codegen +E: anton@korobeynikov.info +D: Exception handling, Windows codegen, ARM EABI N: Benjamin Kramer E: benny.kra@gmail.com D: DWARF Parser -N: Ted Kremenek -D: Clang Static Analyzer +N: Sergei Larin +E: slarin@codeaurora.org +D: VLIW Instruction Scheduling, Packetization N: Chris Lattner E: sabre@nondot.org W: http://nondot.org/~sabre/ D: Everything not covered by someone else -N: John McCall -E: rjmccall@apple.com -D: Clang LLVM IR generation +N: Tim Northover +E: Tim.Northover@arm.com +D: AArch64 backend N: Jakob Olesen D: Register allocators and TableGen +N: Richard Osborne +E: richard@xmos.com +D: XCore Backend + N: Chad Rosier E: mcrosier@apple.com -D: MS-inline asm, fast-isel +D: Fast-Isel + +N: Nadav Rotem +E: nrotem@apple.com +D: X86 Backend, Loop Vectorizer N: Duncan Sands E: baldrick@free.fr D: DragonEgg +N: Michael Spencer +E: bigcheesegs@gmail.com +D: Windows parts of Support, Object, ar, nm, objdump, ranlib, size + +N: Tom Stellard +E: thomas.stellard@amd.com +E: mesa-dev@lists.freedesktop.org +D: R600 Backend + N: Andrew Trick E: atrick@apple.com -D: Instruction Scheduling +D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling