X-Git-Url: http://plrg.eecs.uci.edu/git/?a=blobdiff_plain;f=CODE_OWNERS.TXT;h=10bf071801fd2bb8f469ce4a8a1e66ba1823000e;hb=081f4558cfc909bdbd4122be73f1acf04fad55fa;hp=9a0ec68e7dfa5f4b1f4bdaea54844dce87ff6de1;hpb=ec3d69539e4e04703dce3abf527037c9979b2cc7;p=oota-llvm.git

diff --git a/CODE_OWNERS.TXT b/CODE_OWNERS.TXT
index 9a0ec68e7df..10bf071801f 100644
--- a/CODE_OWNERS.TXT
+++ b/CODE_OWNERS.TXT
@@ -16,6 +16,15 @@ N: Owen Anderson
 E: resistor@mac.com
 D: SelectionDAG (lib/CodeGen/SelectionDAG/*)
 
+N: Rafael Avila de Espindola
+E: rafael.espindola@gmail.com
+D: Gold plugin (tools/gold/*)
+
+N: Chandler Carruth
+E: chandlerc@gmail.com
+E: chandlerc@google.com
+D: Config, ADT, Support, inlining & related passse, SROA/mem2reg & related passes, CMake, library layering
+
 N: Evan Cheng
 E: evan.cheng@apple.com
 D: ARM target, parts of code generator not covered by someone else
@@ -30,12 +39,17 @@ D: LLDB
 N: Peter Collingbourne
 D: libclc
 
+N: Anshuman Dasgupta
+E: adasgupt@codeaurora.org
+D: Hexagon Backend
+
 N: Hal Finkel
 E: hfinkel@anl.gov
 D: BBVectorize and the PowerPC target
 
-N: Doug Gregor
-D: Clang Frontend Libraries
+N: Venkatraman Govindaraju
+E: venkatra@cs.wisc.edu
+D: Sparc Backend (lib/Target/Sparc/*)
 
 N: Tobias Grosser
 D: Polly
@@ -51,6 +65,14 @@ N: Justin Holewinski
 E: jholewinski@nvidia.com
 D: NVPTX Target (lib/Target/NVPTX/*)
 
+N: Andy Kaylor
+E: andrew.kaylor@intel.com
+D: MCJIT, RuntimeDyld and JIT event listeners
+
+N: Galina Kistanova
+E: gkistanova@gmail.com
+D: LLVM Buildbot
+
 N: Anton Korobeynikov
 E: anton@korobeynikov.info
 D: Exception handling, Windows codegen, ARM EABI
@@ -59,9 +81,6 @@ N: Benjamin Kramer
 E: benny.kra@gmail.com
 D: DWARF Parser
 
-N: Ted Kremenek
-D: Clang Static Analyzer
-
 N: Sergei Larin
 E: slarin@codeaurora.org
 D: VLIW Instruction Scheduling, Packetization
@@ -71,16 +90,20 @@ E: sabre@nondot.org
 W: http://nondot.org/~sabre/
 D: Everything not covered by someone else
 
-N: John McCall
-E: rjmccall@apple.com
-D: Clang LLVM IR generation
+N: Tim Northover
+E: Tim.Northover@arm.com
+D: AArch64 backend
 
 N: Jakob Olesen
 D: Register allocators and TableGen
 
+N: Richard Osborne
+E: richard@xmos.com
+D: XCore Backend
+
 N: Chad Rosier
 E: mcrosier@apple.com
-D: MS-inline asm, fast-isel
+D: Fast-Isel
 
 N: Nadav Rotem
 E: nrotem@apple.com
@@ -90,6 +113,19 @@ N: Duncan Sands
 E: baldrick@free.fr
 D: DragonEgg
 
+N: Michael Spencer
+E: bigcheesegs@gmail.com
+D: Windows parts of Support, Object, ar, nm, objdump, ranlib, size
+
+N: Tom Stellard
+E: thomas.stellard@amd.com
+E: mesa-dev@lists.freedesktop.org
+D: R600 Backend
+
 N: Andrew Trick
 E: atrick@apple.com
-D: Instruction Scheduling
+D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling
+
+N: Bill Wendling
+E: wendling@apple.com
+D: libLTO & IR Linker